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2020 – today
- 2024
[c24]Pierre Leduc, Ximing Fu, Yushi Zhou:
A 3.04-fs FoM Hybrid LDO Regulator with Fast Transient Algorithm and Wide Load Range. MWSCAS 2024: 581-585- [c23]Wenhao Wu, Fei Yuan, Yushi Zhou:
A 0.6-V 108-nW 100-kHz Sub-Threshold Delay-Locked Loop with Digital Linearization for Low-Power SAR ADC. MWSCAS 2024: 1172-1175 - [c22]Zakary Williams, Lei Chen, Yushi Zhou, Zhanjun Bai:
A 580-nA Quiescent Current Low-Dropout Regulator with Zero-Tracking for Wide Load Applications. NewCAS 2024: 163-167 - [c21]Pierre Leduc, Ximing Fu, Yushi Zhou, Kamal El-Sankary:
A Dual Loop Current Mode Feedback Capacitor Less LDO for High Current Applications. NewCAS 2024: 298-302 - 2023
- [j12]Fei Yuan
, Parth Parekh, Yushi Zhou:
Bi-Directional Gated Ring Oscillator Time Integrator. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3461-3473 (2023) - [c20]Ximing Fu, Yushi Zhou, Pierre Leduc, Kamal El-Sankary:
A High-Speed Capacitor Less LDO with Multi-Loop Fast Feedback and Bandwidth Enhancement Control. ISCAS 2023: 1-5 - [c19]Daniel Junehee Lee, Fei Yuan, Yushi Zhou:
A Cyclic Vernier Digital-to-Time Converter for Time-Mode Successive Approximation TDC. MWSCAS 2023: 468-471 - [c18]Daniel Junehee Lee, Fei Yuan, Yushi Zhou:
Time-Interpolated Vernier Digital-to-Time Converter with Applications in Time-Mode SAR TDC. NEWCAS 2023: 1-4 - 2022
- [j11]Parth Parekh, Fei Yuan, Yushi Zhou:
Gated Vernier delay line time integrator with applications in ΔΣ time-to-digital converter. Microelectron. J. 119: 105316 (2022) - [j10]Parth Parekh, Fei Yuan, Yushi Zhou:
Improved Metastability of True Single-Phase Clock D-Flipflops With Applications in Vernier Time-to-Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 69(3): 1102-1114 (2022) - [c17]Ximing Fu, Yushi Zhou, Kamal El-Sankary:
Design of High-Bandwidth, High-DC Gain Single-Stage Amplifier for High-Speed ADCs. CCECE 2022: 219-223 - [c16]Parth Parekh, Fei Yuan, Yushi Zhou:
Bi-Directional Gated Ring Oscillator Time Integrator for Time-Based Mixed-Signal Processing. MWSCAS 2022: 1-4 - [c15]Parth Parekh, Fei Yuan, Yushi Zhou:
All-Digital Bi-Directional Gated Ring Oscillator Time Integrator for Mixed-Mode Signal Processing. NEWCAS 2022: 25-29 - 2021
- [j9]Jared Mercier, Yushi Zhou:
Low-power multi-band injection-locked wireless receiver in 0.13 μm CMOS. IET Circuits Devices Syst. 15(6): 522-539 (2021) - [j8]Daniel Junehee Lee, Fei Yuan, Gul N. Khan, Yushi Zhou:
An 8-bit digital-to-time converter with pre-skewing and time interpolation. IET Circuits Devices Syst. 15(7): 670-685 (2021) - [j7]Daniel Junehee Lee, Fei Yuan, Yushi Zhou:
All-digital successive approximation TDC in time-mode signal processing. Microelectron. J. 114: 105152 (2021) - [c14]Daniel Junehee Lee, Fei Yuan, Yushi Zhou:
All-Digital Successive Approximation TDC in Time-Mode Signal Processing. ISCAS 2021: 1-4 - [c13]Daniel Junehee Lee, Fei Yuan, Yushi Zhou:
Successive Approximation Register TDC in Time-Mode Signal Processing. MWSCAS 2021: 945-948 - [c12]Parth Parekh, Fei Yuan, Yushi Zhou:
Gated Vernier Delay Line Time Integrator for Time-Mode Signal Processing. MWSCAS 2021: 1082-1085 - 2020
- [c11]Carlos Christoffersen, Thinh Ngo, Ruiqi Song, Yushi Zhou, Samuel Pichardo, Laura Curiel:
Quasi Class-DE Driving of HIFU Transducer Arrays. ISCAS 2020: 1 - [c10]Parth Parekh, Fei Yuan, Yushi Zhou:
Area/Power-Efficient True-Single-Phase-Clock D-Flipflops with Improved Metastability. MWSCAS 2020: 182-185 - [c9]Parth Parekh, Fei Yuan, Yushi Zhou:
All-Digital Time Integrator Using Bi-Directional Gated Vernier Delay Line. MWSCAS 2020: 321-324
2010 – 2019
- 2019
- [j6]Carlos Christoffersen, Thinh Ngo, Ruiqi Song, Yushi Zhou, Samuel Pichardo, Laura Curiel:
Quasi Class-DE Driving of HIFU Transducer Arrays. IEEE Trans. Biomed. Circuits Syst. 13(1): 214-224 (2019) - [c8]Rashed Siddiqui, Fei Yuan, Yushi Zhou:
A 500-MS/s 8.4-ps Double-Edge Successive Approximation TDC in 65 nm CMOS. MWSCAS 2019: 770-773 - [c7]Jared Mercier, Yushi Zhou:
35 μW Linearized LNA for WSN Applications. MWSCAS 2019: 965-968 - 2018
- [c6]Yushi Zhou, Jared Mercier, Fei Yuan:
A Comparative Study Of Injection Locked Frequency Divider Using Harmonic Mixer In Weak And Strong Inversion. MWSCAS 2018: 97-100 - [c5]Carlos Christoffersen, Thinh Ngo, Ruiqi Song, Yushi Zhou, Samuel Pichardo, Laura Curiel:
Suboptimal Class DE Operation for Ultrasound Transducer Arrays. NEWCAS 2018: 234-237 - 2017
- [c4]Fengrui Chen, Yushi Zhou, Wenting Wang:
A spatial calibration method for satellite-derived precipitation estimates over China. Geoinformatics 2017: 1-5 - [c3]Yushi Zhou, Fei Yuan:
Adaptive 4PAM decision feedback equalizer with reduced number of slicers. MWSCAS 2017: 775-778 - 2015
- [j5]Yushi Zhou, Fei Yuan:
Study of injection-locked non-harmonic oscillators using Volterra series. IET Circuits Devices Syst. 9(2): 119-130 (2015) - [j4]Yushi Zhou, Norman M. Filiol, Fei Yuan:
A Quadrature Charge-Domain Sampling Mixer With Embedded FIR, IIR, and N-Path Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1431-1440 (2015) - 2013
- [j3]Fei Yuan, Yushi Zhou:
Frequency-Domain Study of Lock Range of Non-Harmonic Oscillators With Multiple Multi-Tone Injections. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(6): 1395-1406 (2013) - [c2]Yushi Zhou, Norm M. Filiol, Shaul Peker, Fei Yuan:
Low-power programmable charge-domain sampler with embedded N-path bandpass filter for software-defined radio. ISCAS 2013: 1934-1937 - 2012
- [j2]Fei Yuan, Yushi Zhou:
A Phasor-Domain Study of Lock Range of Harmonic Oscillators With Multiple Injections. IEEE Trans. Circuits Syst. II Express Briefs 59-II(8): 466-470 (2012) - [c1]Fei Yuan, Yushi Zhou:
A frequency-domain study of lock range of harmonic oscillators with multiple injections. NEWCAS 2012: 29-32 - 2011
- [j1]Yushi Zhou, Fei Yuan:
A Study of the Lock Range of Injection-Locked CMOS Active-Inductor Oscillators Using a Linear Control System Approach. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 627-631 (2011)
Coauthor Index
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