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2010 – 2019
- 2010
[c9]Bao Liu, Zhen Cao, Jun Tao, Xuan Zeng, Pushan Tang, H.-S. Philip Wong:
Intel LVS logic as a combinational logic paradigm in CNT technology. NANOARCH 2010: 77-81
2000 – 2009
- 2007
- [j3]Ming-e Jing, Dian Zhou, Pushan Tang, Xiaofang Zhou, Hua Zhang:
Solving SAT problem by heuristic polarity decision-making algorithm. Sci. China Ser. F Inf. Sci. 50(6): 915-925 (2007) - [c8]Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng:
Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic. ASP-DAC 2007: 203-208 - [c7]Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng:
WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. ASP-DAC 2007: 209-214 - 2005
- [j2]Min Ding, Pushan Tang, Dian Zhou:
Integrating advanced reasoning into a SAT solver. Sci. China Ser. F Inf. Sci. 48(3): 366-378 (2005) - [c6]Wei Huang, Pushan Tang, Min Ding:
Sequential equivalence checking using cuts. ASP-DAC 2005: 455-458 - 2001
- [j1]Li Yueping, Pushan Tang:
Relaxation Algorithm of Piecing-Error for Sub-Images. J. Comput. Sci. Technol. 16(3): 270-277 (2001) - 2000
- [c5]Xuan Zeng, Mingyuan Li, Wenqing Zhao, Pushan Tang, Dian Zhou:
Parasitic and mismatch modeling for optimal stack generation [in CMOS]. ISCAS 2000: 193-196
1990 – 1999
- 1999
- [c4]Feng Zhou, Zhijun Huang, Jiarong Tong, Pushan Tang:
An Analytical Delay Model for SRAM-Based FPGA Interconnections. ASP-DAC 1999: 101-104 - [c3]Xuan Zeng, J. Guan, Wenqing Zhao, Pushan Tang, Dian Zhou:
A constraint-based placement refinement method for CMOS analog cell layout. ISCAS (6) 1999: 408-411 - 1998
- [c2]Rongzheng Zhou, Jiarong Tong, Pushan Tang:
FPART: A Multi-way FPGA Partitioning Procedure Based on the Improved FM Algorithm. ASP-DAC 1998: 513-518
1980 – 1989
- 1989
- [c1]Ying-Meng Li, Pushan Tang:
Global refinement for building block layout. ICCAD 1989: 90-93
Coauthor Index
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