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ORCIDMasa-Aki Fukase
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2010 – 2019
- 2015
[j1]Nanako Niioka, Masayuki Watanabe, Masa-Aki Fukase, Masashi Imai, Atsushi Kurokawa:
Signal Propagation Delay Model in Vertically Stacked Chips. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(12): 2614-2624 (2015)- [c17]Nanako Niioka, Masashi Imai, Masa-Aki Fukase, Yuuki Miura, Kaoru Furumi, Atsushi Kurokawa:
Clock skew reduction for stacked chips using multiple source buffers. ISCIT 2015: 327-330 - [c16]Masayuki Watanabe, Nanako Niioka, Tetsuya Kobayashi, Rosely Karel, Masa-Aki Fukase, Masashi Imai, Atsushi Kurokawa:
An effective model for evaluating vertical propagation delay in TSV-based 3-D ICs. ISQED 2015: 519-523 - 2014
- [c15]Masayuki Watanabe, Masa-Aki Fukase, Masashi Imai, Nanako Niioka, Tetsuya Kobayashi, Rosely Karel, Atsushi Kurokawa:
Modeling of substrate contacts in TSV-based 3D ICs. 3DIC 2014: 1-4 - [c14]Nanako Niioka, Masayuki Watanabe, Rosely Karel, Tetsuya Kobayashi, Masashi Imai, Masa-Aki Fukase, Atsushi Kurokawa:
Impact of on-chip interconnects on vertical signal propagation in 3D ICs. APCCAS 2014: 607-610 - [c13]Masayuki Watanabe, Rosely Karel, Nanako Niioka, Tetsuya Kobayashi, Masa-Aki Fukase, Masashi Imai, Atsushi Kurokawa:
Effect of substrate contacts on reducing crosstalk noise between TSVs. APCCAS 2014: 763-766 - 2013
- [c12]Masa-Aki Fukase, Kohta Okamoto:
An interactive rewards card system embedded in smart phones and a cloud server. GCCE 2013: 273-274 - 2012
- [c11]Masa-Aki Fukase, Atsushi Kurokawa, Kouhei Ichinohe, Tatsuya Takaki:
Optimum design of the execution stage of embedded processors. ISCIT 2012: 533-537 - 2011
- [c10]Masa-Aki Fukase, Harunobu Uchiumi, Kazuki Narita, Tatsuya Takaki, Naomichi Mimura, Kohei Ichinohe, Tomoaki Sato, Atsushi Kurokawa:
Development of a next generation ubiquitous processor chip. ISPACS 2011: 1-4 - 2010
- [c9]Masa-Aki Fukase, Tomoaki Sato:
H/S Collaborative Development of a Ubiquitous Processor Free from Instruction Scheduling and Pipeline Disturbance. ACIS-ICIS 2010: 57-62 - [c8]Masa-Aki Fukase, Ryosuke Murakami, Tomoaki Sato:
Design and chip implementation of an instruction scheduling free ubiquitous processor. ASP-DAC 2010: 375-376
2000 – 2009
- 2009
- [c7]Masa-Aki Fukase, Kazunori Noda, Atsuko Yokoyama, Tomoaki Sato:
Design and chip implementation of the ubiquitous processor HCgorilla. ASP-DAC 2009: 129-130 - [c6]Masa-Aki Fukase, Atsuko Yokoyama, Tomoaki Sato:
A ubiquitous processor embedded with progressive cipher pipelines. ACM Great Lakes Symposium on VLSI 2009: 381-384 - 2007
- [c5]Masa-Aki Fukase, Tomoaki Sato:
A Stream Cipher Engine for Ad-Hoc Security. CIS 2007: 902-906 - 2006
- [c4]Masa-Aki Fukase, Hiroki Takeda, Tomoaki Sato:
Hardware/Software Co-design of a Secure Ubiquitous System. CIS 2006: 385-395 - 2001
- [c3]Masa-Aki Fukase, Ryusuke Egawa, Tomoaki Sato, Tadao Nakamura:
Scaling Up Of Wave Pipelines. VLSI Design 2001: 439-445
1990 – 1999
- 1993
- [c2]Masa-Aki Fukase, Tadao Nakamura:
Parallel Processing and Hardware Support of Symbols. ICTAI 1993: 450-451 - 1991
- [c1]Masa-Aki Fukase, Tadao Nakamura:
Semiparallel execution of compiled Lisp programs. COMPSAC 1991: 719-724
Coauthor Index
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