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ORCIDAnkur Srivastava 0001
Person information
- affiliation: University of Maryland, Department of Electrical and Computer Engineering, College Park, MD, USA
- affiliation (PhD 2002): University of California Los Angeles, CA, USA
Other persons with the same name
- Ankur Srivastava — disambiguation page
- Ankur Srivastava 0002
![[0000-0002-3963-265X]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-3963-265X")
— University of Newcastle, Center for Water Security and Environmental Sustainability and School of Engineering, Callaghan, NSW, Australia
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2020 – today
- 2024
[j61]Yuntao Liu, Daniel Xing, Isaac McDaniel, Olsan Ozbay, Abir Akib, Mumtahina Islam Sukanya, Sanjay Rekhi, Ankur Srivastava:
Security Advantages and Challenges of 3D Heterogeneous Integration. Computer 57(3): 107-112 (2024)- [j60]Md. Moshiur Rahman, Jim Geist, Daniel Xing, Yuntao Liu, Ankur Srivastava, Travis Meade, Yier Jin, Swarup Bhunia:
Security Evaluation of State Space Obfuscation of Hardware IP through a Red Team-Blue Team Practice. ACM Trans. Design Autom. Electr. Syst. 29(3): 50:1-50:18 (2024) - [c115]Abir Ahsan Akib, Ankur Srivastava:
HQ-DTM: A Hierarchical Q-learning Algorithm for Dynamic Thermal Management of Multi-core Processors. ISLPED 2024: 1-6 - [c114]Daniel H. Xing, Ankur Srivastava:
3D-Aware Low Power High-level Resource Binding and Co-Design. ISLPED 2024: 1-6 - [c113]Daniel Xing, Abir Akib, Yuntao Liu, Ankur Srivastava:
Co-Design for Heterogeneous Integration: High Level Decisions to the Rescue. MWSCAS 2024: 870-872 - 2023
- [j59]Farimah Farahmandi, Ankur Srivastava, Giorgio Di Natale, Mark M. Tehranipoor:
Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle. ACM J. Emerg. Technol. Comput. Syst. 19(1): 4:1-4:4 (2023) - [j58]Michael Zuzak, Yuntao Liu, Ankur Srivastava:
Security-Aware Resource Binding to Enhance Logic Obfuscation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4528-4540 (2023) - [c112]Priya Mittu, Yuntao Liu, Ankur Srivastava:
TimingCamouflage+ Decamouflaged. ACM Great Lakes Symposium on VLSI 2023: 575-580 - [c111]Daniel Xing, Yuntao Liu, Ankur Srivastava:
Low Power Logic Obfuscation Through System Level Clock Gating. ISLPED 2023: 1-6 - [c110]Daniel Xing, Michael Zuzak, Ankur Srivastava:
Low Overhead System-Level Obfuscation through Hardware Resource Sharing. ISQED 2023: 1-8 - [i18]Yuntao Liu, Aruna Jayasena, Prabhat Mishra, Ankur Srivastava:
Logic Locking based Trojans: A Friend Turns Foe. CoRR abs/2309.15067 (2023) - 2022
- [j57]Michael Zuzak, Ankit Mondal, Ankur Srivastava:
Evaluating the Security of Logic-Locked Probabilistic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2004-2009 (2022) - [c109]Yuntao Liu, Michael Zuzak, Daniel Xing, Isaac McDaniel, Priya Mittu, Olsan Ozbay, Abir Akib, Ankur Srivastava:
A Survey on Side-Channel-based Reverse Engineering Attacks on Deep Neural Networks. AICAS 2022: 312-315 - [c108]Swarup Bhunia, Amitabh Das, Saverio Fazzari, Vivian Kammler, David Kehlet, Jeyavijayan Rajendran, Ankur Srivastava:
Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool. ICCAD 2022: 25:1-25:8 - [c107]Michael Zuzak, Yuntao Liu, Isaac McDaniel, Ankur Srivastava:
A Combined Logical and Physical Attack on Logic Obfuscation. ICCAD 2022: 68:1-68:9 - [c106]Isaac McDaniel, Michael Zuzak, Ankur Srivastava:
A Black-Box Sensitization Attack on SAT-Hard Instances in Logic Obfuscation. ICCD 2022: 239-246 - [i17]Abhishek Chakraborty, Daniel Xing, Yuntao Liu, Ankur Srivastava:
DynaMarks: Defending Against Deep Learning Model Extraction Using Dynamic Watermarking. CoRR abs/2207.13321 (2022) - 2021
- [j56]Yuntao Liu, Michael Zuzak, Yang Xie, Abhishek Chakraborty, Ankur Srivastava:
Robust and Attack Resilient Logic Locking with a High Application-Level Impact. ACM J. Emerg. Technol. Comput. Syst. 17(3): 37:1-37:22 (2021) - [j55]Abhishek Chakraborty, Yuntao Liu, Ankur Srivastava:
Evaluating the Security of Delay-Locked Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(4): 608-619 (2021) - [j54]Michael Zuzak, Yuntao Liu, Ankur Srivastava:
Trace Logic Locking: Improving the Parametric Space of Logic Locking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1531-1544 (2021) - [j53]Ankit Mondal, Ankur Srivastava:
Ising-FPGA: A Spintronics-based Reconfigurable Ising Model Solver. ACM Trans. Design Autom. Electr. Syst. 26(1): 4:1-4:27 (2021) - [c105]Michael Zuzak, Yuntao Liu, Ankur Srivastava:
A Resource Binding Approach to Logic Obfuscation. DAC 2021: 235-240 - [c104]Benjamin Tan, Siddharth Garg, Ramesh Karri, Yuntao Liu, Michael Zuzak, Abhisek Chakraborty, Ankur Srivastava, Omid Aramoon, Qian Xu, Gang Qu, Adam A. Porter, Jeno Szep, Warren Savage:
Invited: Independent Verification and Validation of Security-Aware EDA Tools and IP. DAC 2021: 1299-1302 - [i16]Yuntao Liu, Michael Zuzak, Yang Xie, Abhishek Chakraborty, Ankur Srivastava:
Robust and Attack Resilient Logic Locking with a High Application-Level Impact. CoRR abs/2101.02577 (2021) - [i15]Michael Zuzak, Yuntao Liu, Ankur Srivastava:
A Resource Binding Approach to Logic Obfuscation. IACR Cryptol. ePrint Arch. 2021: 252 (2021) - [i14]Michael Zuzak, Ankur Srivastava:
Enhancing Processor Design Obfuscation Through Security-Aware On-Chip Memory and Data Path Design. IACR Cryptol. ePrint Arch. 2021: 295 (2021) - 2020
- [j52]Shang Li, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob:
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. IEEE Comput. Archit. Lett. 19(2): 110-113 (2020) - [j51]Ankit Mondal, Ankur Srivastava:
Energy-efficient Design of MTJ-based Neural Networks with Stochastic Computing. ACM J. Emerg. Technol. Comput. Syst. 16(1): 7:1-7:27 (2020) - [j50]Abhishek Chakraborty, Nithyashankari Gummidipoondi Jayasankaran, Yuntao Liu, Jeyavijayan Rajendran, Ozgur Sinanoglu, Ankur Srivastava, Yang Xie, Muhammad Yasin, Michael Zuzak:
Keynote: A Disquisition on Logic Locking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 1952-1972 (2020) - [c103]Yuntao Liu, Ankur Srivastava:
GANRED: GAN-based Reverse Engineering of DNNs via Cache Side-Channel. CCSW 2020: 41-52 - [c102]Abhishek Chakraborty, Ankit Mondal, Ankur Srivastava:
Hardware-Assisted Intellectual Property Protection of Deep Learning Models. DAC 2020: 1-6 - [c101]Ankit Mondal, Michael Zuzak, Ankur Srivastava:
StatSAT: A Boolean Satisfiability based Attack on Logic-Locked Probabilistic Circuits. DAC 2020: 1-6 - [c100]Yuntao Liu, Ankit Mondal, Abhishek Chakraborty, Michael Zuzak, Nina Jacobsen, Daniel Xing, Ankur Srivastava:
A Survey on Neural Trojans. ISQED 2020: 33-39 - [c99]Ankit Mondal, Ankur Srivastava:
Spintronics-based Reconfigurable Ising Model Architecture. ISQED 2020: 134-140 - [c98]Yuntao Liu, Michael Zuzak, Yang Xie, Abhishek Chakraborty, Ankur Srivastava:
Strong Anti-SAT: Secure and Effective Logic Locking. ISQED 2020: 199-205 - [c97]Michael Zuzak, Ankur Srivastava:
ObfusGEM: Enhancing Processor Design Obfuscation Through Security-Aware On-Chip Memory and Data Path Design. MEMSYS 2020: 260-271 - [i13]Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks:
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR abs/2006.06806 (2020) - [i12]Yuntao Liu, Ankit Mondal, Abhishek Chakraborty, Michael Zuzak, Nina Jacobsen, Daniel Xing, Ankur Srivastava:
A Survey on Neural Trojans. IACR Cryptol. ePrint Arch. 2020: 201 (2020) - [i11]Yuntao Liu, Michael Zuzak, Yang Xie, Abhishek Chakraborty, Ankur Srivastava:
Strong Anti-SAT: Secure and Effective Logic Locking. IACR Cryptol. ePrint Arch. 2020: 202 (2020) - [i10]Yuntao Liu, Ankur Srivastava:
GANRED: GAN-based Reverse Engineering of DNNs via Cache Side-Channel. IACR Cryptol. ePrint Arch. 2020: 1014 (2020) - [i9]Abhishek Chakraborty, Ankit Mondal, Ankur Srivastava:
Hardware-Assisted Intellectual Property Protection of Deep Learning Models. IACR Cryptol. ePrint Arch. 2020: 1016 (2020)
2010 – 2019
- 2019
- [j49]Ankit Mondal, Ankur Srivastava:
In Situ Stochastic Training of MTJ Crossbars With Machine Learning Algorithms. ACM J. Emerg. Technol. Comput. Syst. 15(2): 16:1-16:29 (2019) - [j48]Yang Xie, Ankur Srivastava:
Anti-SAT: Mitigating SAT Attack on Logic Locking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(2): 199-207 (2019) - [j47]Zhiyuan Yang, Caleb Serafy, Tiantao Lu, Ankur Srivastava:
Enhanced Phase-Driven Q-Learning-Based DRM for Multicore Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 2022-2031 (2019) - [j46]Chongxi Bao, Ankur Srivastava:
Reducing Timing Side-Channel Information Leakage Using 3D Integration. IEEE Trans. Dependable Secur. Comput. 16(4): 665-678 (2019) - [c96]Michael Zuzak, Ankur Srivastava:
Memory Locking: An Automated Approach to Processor Design Obfuscation. ISVLSI 2019: 541-546 - [c95]Abhishek Chakraborty, Ankur Srivastava:
Hardware-Software Co-Design Based Obfuscation of Hardware Accelerators. ISVLSI 2019: 547-552 - [c94]Yuntao Liu, Dana Dachman-Soled, Ankur Srivastava:
Mitigating Reverse Engineering Attacks on Deep Neural Networks. ISVLSI 2019: 657-662 - [i8]Abhishek Chakraborty, Ankur Srivastava:
Hardware-Software Co-Design Based Obfuscation of Hardware Accelerators. IACR Cryptol. ePrint Arch. 2019: 1040 (2019) - 2018
- [j45]Yuntao Liu, Yang Xie, Chongxi Bao, Ankur Srivastava:
A Combined Optimization-Theoretic and Side- Channel Approach for Attacking Strong Physical Unclonable Functions. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 73-81 (2018) - [c93]Abhishek Chakraborty, Yang Xie, Ankur Srivastava:
GPU obfuscation: attack and defense strategies. DAC 2018: 122:1-122:6 - [c92]Abhishek Chakraborty, Yuntao Liu, Ankur Srivastava:
TimingSAT: timing profile embedded SAT attack. ICCAD 2018: 6 - [c91]Zhiyuan Yang, Ankur Srivastava:
Value-driven Synthesis for Neural Network ASICs. ISLPED 2018: 1:1-1:6 - [c90]Ankit Mondal, Ankur Srivastava:
In-situ Stochastic Training of MTJ Crossbar based Neural Networks. ISLPED 2018: 51:1-51:6 - [c89]Zhiyuan Yang, Michael Zuzak, Ankur Srivastava:
HMCTherm: a cycle-accurate HMC simulator integrated with detailed power and thermal simulation. MEMSYS 2018: 209-117 - [i7]Ankit Mondal, Ankur Srivastava:
Data Driven Optimizations for MTJ based Stochastic Computing. CoRR abs/1804.03228 (2018) - [i6]Ankit Mondal, Ankur Srivastava:
In-situ Stochastic Training of MTJ Crossbar based Neural Networks. CoRR abs/1806.09057 (2018) - 2017
- [j44]Yang Xie, Chongxi Bao, Ankur Srivastava:
Security-Aware 2.5D Integrated Circuit Design Flow Against Hardware IP Piracy. Computer 50(5): 62-71 (2017) - [j43]Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Sandeep Kumar Samal, Sung Kyu Lim, Ankur Srivastava:
TSV-Based 3-D ICs: Design Methods and Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1593-1619 (2017) - [j42]Tiantao Lu, Ankur Srivastava:
Low-Power Clock Tree Synthesis for 3D-ICs. ACM Trans. Design Autom. Electr. Syst. 22(3): 50:1-50:24 (2017) - [c88]Yang Xie, Ankur Srivastava:
Delay Locking: Security Enhancement of Logic Locking against IC Counterfeiting and Overproduction. DAC 2017: 9:1-9:6 - [c87]Zhiyuan Yang, Caleb Serafy, Tiantao Lu, Ankur Srivastava:
Phase-driven Learning-based Dynamic Reliability Management For Multi-core Processors. DAC 2017: 46:1-46:6 - [c86]Caleb Serafy, Zhiyuan Yang, Ankur Srivastava:
Design Space Modeling and Simulation for Physically Constrained 3D CPUs. ACM Great Lakes Symposium on VLSI 2017: 375-380 - [c85]Chongxi Bao, Ankur Srivastava:
Exploring timing side-channel attacks on path-ORAMs. HOST 2017: 68-73 - [c84]Abhishek Chakraborty, Ankit Mondal, Ankur Srivastava:
Correlation power analysis attack against STT-MRAM based cyptosystems. HOST 2017: 171 - [c83]Abhishek Chakraborty, Yang Xie, Ankur Srivastava:
Template Attack Based Deobfuscation of Integrated Circuits. ICCD 2017: 41-44 - [c82]Yuntao Liu, Yang Xie, Ankur Srivastava:
Neural Trojans. ICCD 2017: 45-48 - [c81]Yuntao Liu, Chongxi Bao, Yang Xie, Ankur Srivastava:
Introducing TFUE: The trusted foundry and untrusted employee model in IC supply chain security. ISCAS 2017: 1-4 - [c80]Ankit Mondal, Ankur Srivastava:
Power optimizations in MTJ-based Neural Networks through Stochastic Computing. ISLPED 2017: 1-6 - [i5]Ankit Mondal, Ankur Srivastava:
Power Optimizations in MTJ-based Neural Networks through Stochastic Computing. CoRR abs/1709.04322 (2017) - [i4]Yuntao Liu, Yang Xie, Ankur Srivastava:
Neural Trojans. CoRR abs/1710.00942 (2017) - [i3]Abhishek Chakraborty, Ankit Mondal, Ankur Srivastava:
Correlation Power Analysis Attack against STT-MRAM Based Cyptosystems. IACR Cryptol. ePrint Arch. 2017: 413 (2017) - [i2]Yang Xie, Ankur Srivastava:
Anti-SAT: Mitigating SAT Attack on Logic Locking. IACR Cryptol. ePrint Arch. 2017: 761 (2017) - 2016
- [j41]Caleb Serafy, Zhiyuan Yang, Ankur Srivastava, Yuanchen Hu, Yogendra Joshi:
Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks. IEEE Des. Test 33(2): 40-48 (2016) - [j40]Chongxi Bao, Domenic Forte, Ankur Srivastava:
On Reverse Engineering-Based Hardware Trojan Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(1): 49-57 (2016) - [j39]Yang Xie, Chongxi Bao, Caleb Serafy, Tiantao Lu, Ankur Srivastava, Mark M. Tehranipoor:
Security and Vulnerability Implications of 3D ICs. IEEE Trans. Multi Scale Comput. Syst. 2(2): 108-122 (2016) - [j38]Caleb Serafy, Avram Bar-Cohen, Ankur Srivastava, Donald Yeung:
Unlocking the True Potential of 3-D CPUs With Microfluidic Cooling. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1515-1523 (2016) - [c79]Yang Xie, Ankur Srivastava:
Mitigating SAT Attack on Logic Locking. CHES 2016: 127-146 - [c78]Zhiyuan Yang, Caleb Serafy, Ankur Srivastava:
ECO Based Placement and Routing Framework for 3D FPGAs with Micro-fluidic Cooling. FCCM 2016: 199 - [c77]Zhiyuan Yang, Ankur Srivastava:
Physical Design of 3D FPGAs Embedded with Micro-channel-based Fluidic Cooling. FPGA 2016: 54-63 - [c76]Yuntao Liu, Yang Xie, Chongxi Bao, Ankur Srivastava:
An optimization-theoretic approach for attacking physical unclonable functions. ICCAD 2016: 45 - [c75]Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Ankur Srivastava:
Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs. ISLPED 2016: 82-87 - [c74]Tiantao Lu, Zhiyuan Yang, Ankur Srivastava:
Electromigration-aware placement for 3D-ICs. ISQED 2016: 35-40 - [c73]Tiantao Lu, Zhiyuan Yang, Ankur Srivastava:
Post-Placement Optimization for Thermal-Induced Mechanical Stress Reduction. ISVLSI 2016: 158-163 - [c72]Yang Xie, Chongxi Bao, Yuntao Liu, Ankur Srivastava:
2.5D/3D Integration Technologies for Circuit Obfuscation. MTV 2016: 39-44 - [i1]Yang Xie, Ankur Srivastava:
Mitigating SAT Attack on Logic Locking. IACR Cryptol. ePrint Arch. 2016: 590 (2016) - 2015
- [j37]Caleb Serafy, Ankur Srivastava:
TSV Replacement and Shield Insertion for TSV-TSV Coupling Reduction in 3-D Global Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(4): 554-562 (2015) - [j36]Chongxi Bao, Domenic Forte, Ankur Srivastava:
Temperature Tracking: Toward Robust Run-Time Detection of Hardware Trojans. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(10): 1577-1585 (2015) - [j35]Tiantao Lu, Ankur Srivastava:
Modeling and Layout Optimization for Tapered TSVs. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3129-3132 (2015) - [c71]Yang Xie, Chongxi Bao, Ankur Srivastava:
Security-Aware Design Flow for 2.5D IC Technology. TrustED@CCS 2015: 31-38 - [c70]Tiantao Lu, Ankur Srivastava:
Electromigration-aware Clock Tree Synthesis for TSV-based 3D-ICs. ACM Great Lakes Symposium on VLSI 2015: 27-32 - [c69]Chongxi Bao, Yang Xie, Ankur Srivastava:
A security-aware design scheme for better hardware Trojan detection sensitivity. HOST 2015: 52-55 - [c68]Chongxi Bao, Ankur Srivastava:
3D Integration: New opportunities in defense against cache-timing side-channel attacks. ICCD 2015: 273-280 - 2014
- [j34]Caleb Serafy, Bing Shi, Ankur Srivastava:
A geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs. Integr. 47(3): 307-317 (2014) - [j33]Bing Shi, Ankur Srivastava:
Optimized Micro-Channel Design for Stacked 3-D-ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(1): 90-100 (2014) - [j32]Yufu Zhang, Bing Shi, Ankur Srivastava:
Statistical Framework for Designing On-Chip Thermal Sensing Infrastructure in Nanoscale Systems. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 270-279 (2014) - [c67]Chongxi Bao, Ankur Srivastava:
A Secure Algorithm for Task Scheduling against Side-channel Attacks. TrustED@CCS 2014: 3-12 - [c66]Tiantao Lu, Ankur Srivastava:
Gated low-power clock tree synthesis for 3D-ICs. ISLPED 2014: 319-322 - [c65]Caleb Serafy, Ankur Srivastava, Donald Yeung:
Unlocking the true potential of 3D CPUs with micro-fluidic cooling. ISLPED 2014: 323-326 - [c64]Caleb Serafy, Ankur Srivastava:
Coupling-aware force driven placement of TSVs and shields in 3D-IC layouts. ISPD 2014: 55-62 - [c63]Chongxi Bao, Domenic Forte, Ankur Srivastava:
On application of one-class SVM to reverse engineering-based hardware Trojan detection. ISQED 2014: 47-54 - 2013
- [j31]Bing Shi, Ankur Srivastava:
Micro-Fluidic Cooling for Stacked 3D-ICs: Fundamentals, Modeling and Design. Adv. Comput. 88: 79-124 (2013) - [j30]Bing Shi, Ankur Srivastava, Avram Bar-Cohen:
Co-design of micro-fluidic heat sink and thermal through-silicon-vias for cooling of three-dimensional integrated circuit. IET Circuits Devices Syst. 7(5): 223-231 (2013) - [j29]Domenic Forte, Ankur Srivastava:
Improving the Quality of Delay-Based PUFs via Optical Proximity Correction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1879-1891 (2013) - [j28]Domenic Forte, Ankur Srivastava:
Energy- and Thermal-Aware Video Coding via Encoder/Decoder Workload Balancing. ACM Trans. Embed. Comput. Syst. 12(2s): 96:1-96:26 (2013) - [j27]Domenic Forte, Ankur Srivastava:
Resource-aware architectures for adaptive particle filter based visual target tracking. ACM Trans. Design Autom. Electr. Syst. 18(2): 22:1-22:27 (2013) - [j26]Domenic Forte, Ankur Srivastava:
Thermal-aware sensor scheduling for distributed estimation. ACM Trans. Sens. Networks 9(4): 53:1-53:31 (2013) - [j25]Bing Shi, Yufu Zhang, Ankur Srivastava:
Dynamic Thermal Management Under Soft Thermal Constraints. IEEE Trans. Very Large Scale Integr. Syst. 21(11): 2045-2054 (2013) - [c62]Tiantao Lu, Ankur Srivastava:
Detailed electrical and reliability study of tapered TSVs. 3DIC 2013: 1-7 - [c61]Caleb Serafy, Bing Shi, Ankur Srivastava, Donald Yeung:
High performance 3D stacked DRAM processor architectures with micro-fluidic cooling. 3DIC 2013: 1-8 - [c60]Caleb Serafy, Ankur Srivastava:
Online TSV health monitoring and built-in self-repair to overcome aging. DFTS 2013: 224-229 - [c59]Caleb Serafy, Bing Shi, Ankur Srivastava:
Geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs. ACM Great Lakes Symposium on VLSI 2013: 275-280 - [c58]Bing Shi, Ankur Srivastava:
Thermal stress aware 3D-IC statistical static timing analysis. ACM Great Lakes Symposium on VLSI 2013: 281-286 - [c57]Bing Shi, Caleb Serafy, Ankur Srivastava:
Co-optimization of TSV assignment and micro-channel placement for 3D-ICs. ACM Great Lakes Symposium on VLSI 2013: 337-338 - [c56]Domenic Forte, Chongxi Bao, Ankur Srivastava:
Temperature tracking: an innovative run-time approach for hardware Trojan detection. ICCAD 2013: 532-539 - 2012
- [j24]Bing Shi, Yufu Zhang, Ankur Srivastava:
Accelerating Gate Sizing Using Graphics Processing Units. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(1): 160-164 (2012) - [c55]Domenic Forte, Ankur Srivastava:
On improving the uniqueness of silicon-based physically unclonable functions via optical proximity correction. DAC 2012: 96-105 - [c54]Bing Shi, Ankur Srivastava:
TSV-constrained micro-channel infrastructure design for cooling stacked 3D-ICs. ISPD 2012: 113-118 - [c53]Bing Shi, Ankur Srivastava, Avram Bar-Cohen:
Hybrid 3D-IC Cooling System Using Micro-fluidic Cooling and Thermal TSVs. ISVLSI 2012: 33-38 - [c52]Domenic Forte, Ankur Srivastava:
Manipulating Manufacturing Variations for Better Silicon-Based Physically Unclonable Functions. ISVLSI 2012: 171-176 - [r2]Bing Shi, Ankur Srivastava:
Thermal and Power-Aware Task Scheduling and Data Placement for Storage Centric Datacenters. Handbook of Energy-Aware and Green Computing 2012: 169-189 - 2011
- [j23]Bing Shi, Ankur Srivastava:
Unified datacenter power management considering on-chip and air temperature constraints. Sustain. Comput. Informatics Syst. 1(2): 91-98 (2011) - [j22]Yufu Zhang, Ankur Srivastava:
Accurate Temperature Estimation Using Noisy Thermal Sensors for Gaussian and Non-Gaussian Cases. IEEE Trans. Very Large Scale Integr. Syst. 19(9): 1617-1626 (2011) - [c51]Domenic Forte, Ankur Srivastava:
Adaptable video compression and transmission using lossy and workload balancing techniques. AHS 2011: 145-152 - [c50]Domenic Forte, Ankur Srivastava:
Energy-aware video coding of multiple views via workload balancing. AHS 2011: 295-302 - [c49]Bing Shi, Ankur Srivastava:
Cooling of 3D-IC using non-uniform micro-channels and sensor based dynamic thermal management. Allerton 2011: 1400-1407 - [c48]Bing Shi, Ankur Srivastava, Peng Wang:
Non-uniform micro-channel design for stacked 3D-ICs. DAC 2011: 658-663 - [c47]Domenic Forte, Ankur Srivastava:
Resource-aware architectures for particle filter based visual target tracking. IGCC 2011: 1-6 - [c46]Domenic Forte, Ankur Srivastava:
Energy-aware video storage and retrieval in server environments. IGCC 2011: 1-6 - [c45]Bing Shi, Ankur Srivastava:
Liquid cooling for 3D-ICs. IGCC 2011: 1-6 - [c44]Yufu Zhang, Ankur Srivastava:
Leakage-aware Kalman filter for accurate temperature tracking. IGCC 2011: 1-7 - [c43]Yufu Zhang, Ankur Srivastava:
Statistical characterization of chip power behavior at post-fabrication stage. IGCC 2011: 1-6 - [c42]Domenic Forte, Ankur Srivastava:
Adaptable architectures for distributed visual target tracking. ICCD 2011: 339-345 - [c41]Domenic Forte, Ankur Srivastava:
Energy-aware and quality-scalable data placement and retrieval for disks in video server environments. ICCD 2011: 457-458 - [p1]Raghuraman Gopalan, William Robson Schwartz, Rama Chellappa, Ankur Srivastava:
Face Detection. Visual Analysis of Humans 2011: 71-90 - 2010
- [j21]Yufu Zhang, Ankur Srivastava, Mohamed M. Zahran:
On-chip sensor-driven efficient thermal profile estimation algorithms. ACM Trans. Design Autom. Electr. Syst. 15(3): 25:1-25:27 (2010) - [c40]Yufu Zhang, Ankur Srivastava:
Adaptive and autonomous thermal tracking for high performance computing systems. DAC 2010: 68-73 - [c39]Domenic Forte, Ankur Srivastava:
Thermal-Aware Sensor Scheduling for Distributed Estimation. DCOSS 2010: 116-129 - [c38]Bing Shi, Ankur Srivastava:
Thermal and power-aware task scheduling for Hadoop based storage centric datacenters. Green Computing Conference 2010: 73-83 - [c37]Bing Shi, Yufu Zhang, Ankur Srivastava:
Dynamic thermal management for single and multicore processors under soft thermal constraints. ISLPED 2010: 165-170 - [c36]Domenic Forte, Ankur Srivastava:
Energy and thermal-aware video coding via encoder/decoder workload balancing. ISLPED 2010: 207-212 - [c35]Yufu Zhang, Bing Shi, Ankur Srivastava:
A statistical framework for designing on-chip thermal sensing infrastructure in nano-scale systems. ISPD 2010: 169-176
2000 – 2009
- 2009
- [c34]Yufu Zhang, Ankur Srivastava:
Accurate temperature estimation using noisy thermal sensors. DAC 2009: 472-477 - 2008
- [j20]Vishal Khandelwal, Ankur Srivastava:
Variability-Driven Formulation for Simultaneous Gate Sizing and Postsilicon Tunability Allocation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4): 610-620 (2008) - [j19]Aswin C. Sankaranarayanan, Ankur Srivastava, Rama Chellappa:
Algorithmic and Architectural Optimizations for Computationally Efficient Particle Filtering. IEEE Trans. Image Process. 17(5): 737-748 (2008) - [j18]Azadeh Davoodi, Ankur Srivastava:
Variability Driven Gate Sizing for Binning Yield Optimization. IEEE Trans. Very Large Scale Integr. Syst. 16(6): 683-692 (2008) - [c33]Yufu Zhang, Ankur Srivastava, Mohamed M. Zahran:
Chip level thermal profile estimation using on-chip temperature sensors. ICCD 2008: 432-437 - [r1]Vishal Khandelwal, Ankur Srivastava:
Basic Algorithmic Techniques. Handbook of Algorithms for Physical Design Automation 2008 - 2007
- [j17]Vishal Khandelwal, Ankur Srivastava:
Active mode leakage reduction using fine-grained forward body biasing strategy. Integr. 40(4): 561-570 (2007) - [j16]Vishal Khandelwal, Ankur Srivastava:
Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(7): 1246-1255 (2007) - [j15]Vishal Khandelwal, Ankur Srivastava:
A Quadratic Modeling-Based Framework for Accurate Statistical Timing Analysis Considering Correlations. IEEE Trans. Very Large Scale Integr. Syst. 15(2): 206-215 (2007) - [c32]Vishal Khandelwal, Ankur Srivastava:
Monte-Carlo driven stochastic optimization framework for handling fabrication variability. ICCAD 2007: 105-110 - [c31]Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak:
Statistical timing analysis using Kernel smoothing. ICCD 2007: 97-102 - [c30]Vishal Khandelwal, Ankur Srivastava:
Variability-driven formulation for simultaneous gate sizing and post-silicon tunability allocation. ISPD 2007: 11-18 - [c29]Ashish Dobhal, Vishal Khandelwal, Ankur Srivastava:
Efficient and Accurate Statistical Timing Analysis for Non-Linear Non-Gaussian Variability With Incremental Attributes. VLSI Design 2007: 259-264 - [c28]Ashish Dobhal, Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava:
Variability Driven Joint Leakage-Delay Optimization Through Gate Sizing with Provabale Convergence. VLSI Design 2007: 571-576 - 2006
- [j14]Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak:
A statistical methodology for wire-length prediction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(7): 1327-1336 (2006) - [j13]Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava:
Probabilistic Evaluation of Solutions in Variability-Driven Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 3010-3016 (2006) - [j12]Azadeh Davoodi, Ankur Srivastava:
Effective techniques for the generalized low-power binding problem. ACM Trans. Design Autom. Electr. Syst. 11(1): 52-69 (2006) - [c27]Azadeh Davoodi, Ankur Srivastava:
Variability driven gate sizing for binning yield optimization. DAC 2006: 959-964 - [c26]Azadeh Davoodi, Ankur Srivastava:
Probabilistic evaluation of solutions in variability-driven optimization. ISPD 2006: 17-24 - 2005
- [j11]Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh:
On effective slack management in postscheduling phase. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(4): 645-653 (2005) - [j10]Azadeh Davoodi, Ankur Srivastava:
Voltage scheduling under unpredictabilities: a risk management paradigm. ACM Trans. Design Autom. Electr. Syst. 10(2): 354-368 (2005) - [j9]Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava:
Simultaneous Vt selection and assignment for leakage optimization. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 762-765 (2005) - [j8]Azadeh Davoodi, Ankur Srivastava:
Power-driven simultaneous resource binding and floorplanning: a probabilistic approach. IEEE Trans. Very Large Scale Integr. Syst. 13(8): 934-942 (2005) - [c25]Azadeh Davoodi, Ankur Srivastava:
Simultaneous floorplanning and resource binding: a probabilistic approach. ASP-DAC 2005: 517-522 - [c24]Azadeh Davoodi, Ankur Srivastava:
Wake-up protocols for controlling current surges in MTCMOS-based technology. ASP-DAC 2005: 868-871 - [c23]Vishal Khandelwal, Ankur Srivastava:
A general framework for accurate statistical timing analysis considering correlations. DAC 2005: 89-94 - [c22]Lin Yuan, Gang Qu, Ankur Srivastava:
VLSI CAD tool protection by birthmarking design solutions. ACM Great Lakes Symposium on VLSI 2005: 341-344 - [c21]Aswin C. Sankaranarayanan, Rama Chellappa, Ankur Srivastava:
Algorithmic and Architectural Design Methodology for Particle Filters in Hardware. ICCD 2005: 275-280 - [c20]Azadeh Davoodi, Ankur Srivastava:
Variability-Driven Buffer Insertion Considering Correlations. ICCD 2005: 425-430 - [c19]Azadeh Davoodi, Ankur Srivastava:
Probabilistic dual-Vth leakage optimization under variability. ISLPED 2005: 143-148 - 2004
- [j7]Ankur Srivastava, Ryan Kastner, Chunhong Chen, Majid Sarrafzadeh:
Timing driven gate duplication. IEEE Trans. Very Large Scale Integr. Syst. 12(1): 42-51 (2004) - [j6]Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava:
Empirical models for net-length probability distribution and applications. IEEE Trans. Very Large Scale Integr. Syst. 12(10): 1066-1075 (2004) - [c18]Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava:
High level techniques for power-grid noise immunity. ACM Great Lakes Symposium on VLSI 2004: 13-18 - [c17]Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava:
Variability inspired implementation selection problem. ICCAD 2004: 423-427 - [c16]Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava:
Efficient statistical timing analysis through error budgeting. ICCAD 2004: 473-477 - [c15]Vishal Khandelwal, Ankur Srivastava:
Leakage control through fine-grained placement and sizing of sleep transistors. ICCAD 2004: 533-536 - [c14]Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak:
Wire-length prediction using statistical techniques. ICCAD 2004: 702-705 - [c13]Vishal Khandelwal, Ankur Srivastava:
Active mode leakage reduction using fine-grained forward body biasing strategy. ISLPED 2004: 150-155 - 2003
- [c12]Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh:
Achieving Design Closure Through Delay Relaxation Parameter. ICCAD 2003: 54-57 - [c11]Vishal Khandelwal, Azadeh Davoodi, Akash Nanavati, Ankur Srivastava:
A Probabilistic Approach to Buffer Insertion. ICCAD 2003: 560-567 - [c10]Ankur Srivastava:
Simultaneous Vt selection and assignment for leakage optimization. ISLPED 2003: 146-151 - [c9]Azadeh Davoodi, Ankur Srivastava:
Effective graph theoretic techniques for the generalized low power binding problem. ISLPED 2003: 152-157 - [c8]Azadeh Davoodi, Ankur Srivastava:
Voltage scheduling under unpredictabilities: a risk management paradigm. ISLPED 2003: 302-305 - 2002
- [j5]Chunhong Chen, Elaheh Bozorgzadeh, Ankur Srivastava, Majid Sarrafzadeh:
Budget Management with Applications. Algorithmica 34(3): 261-275 (2002) - [j4]Ankur Srivastava, Eren Kursun, Majid Sarrafzadeh:
Predictability in RT-Level Designs. J. Circuits Syst. Comput. 11(4): 323-332 (2002) - [c7]Ankur Srivastava, Majid Sarrafzadeh:
Predictability: definition, ananlysis and optimization. ICCAD 2002: 118-121 - [c6]Eren Kursun, Ankur Srivastava, Seda Ogrenci Memik, Majid Sarrafzadeh:
Early evaluation techniques for low power binding. ISLPED 2002: 160-165 - [c5]Ankur Srivastava, Majid Sarrafzadeh:
Predictability: Definition, Analysis and Optimization. IWLS 2002: 267-272 - 2001
- [j3]Amir H. Farrahi, Chunhong Chen, Ankur Srivastava, Gustavo E. Téllez, Majid Sarrafzadeh:
Activity-driven clock design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(6): 705-714 (2001) - [j2]Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh:
On the complexity of gate duplication. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(9): 1170-1176 (2001) - [j1]Chunhong Chen, Ankur Srivastava, Majid Sarrafzadeh:
On gate level power optimization using dual-supply voltages. IEEE Trans. Very Large Scale Integr. Syst. 9(5): 616-629 (2001) - [c4]Ankur Srivastava, Chunhong Chen, Majid Sarrafzadeh:
Timing driven gate duplication in technology independent phase. ASP-DAC 2001: 577-582 - [c3]Abhishek Ranjan, Ankur Srivastava, V. Karnam, Majid Sarrafzadeh:
Layout aware retiming. ACM Great Lakes Symposium on VLSI 2001: 25-30 - [c2]Majid Sarrafzadeh, Elaheh Bozorgzadeh, Ryan Kastner, Ankur Srivastava:
Design and analysis of physical design algorithms. ISPD 2001: 82-89 - 2000
- [c1]Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh:
Timing Driven Gate Duplication: Complexity Issues and Algorithms. ICCAD 2000: 447-450
Coauthor Index
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