BibTeX records: Kan Shi

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@inproceedings{DBLP:conf/aspdac/JiangZBBS25,
  author       = {Zijian Jiang and
                  Keran Zheng and
                  David Boland and
                  Yungang Bao and
                  Kan Shi},
  editor       = {Yuichi Nakamura and
                  Yu Wang},
  title        = {Corvus: Efficient {HW/SW} Co-Verification Framework for {RISC-V} Instruction
                  Extensions with {FPGA} Acceleration},
  booktitle    = {Proceedings of the 30th Asia and South Pacific Design Automation Conference,
                  {ASPDAC} 2025, Tokyo, Japan, January 20-23, 2025},
  pages        = {1336--1342},
  publisher    = {{ACM}},
  year         = {2025},
  url          = {https://doi.org/10.1145/3658617.3697757},
  doi          = {10.1145/3658617.3697757},
  timestamp    = {Fri, 07 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/JiangZBBS25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/XuJZBBS25,
  author       = {Shuoxiang Xu and
                  Zijian Jiang and
                  Yuxin Zhang and
                  David Boland and
                  Yungang Bao and
                  Kan Shi},
  editor       = {Andrew Putnam and
                  Jing Li},
  title        = {Hercules: Efficient Verification of High-Level Synthesis Designs with
                  {FPGA} Acceleration},
  booktitle    = {Proceedings of the 2025 {ACM/SIGDA} International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2025, Monterey, CA, USA, 27 February
                  2025 - 1 March 2025},
  pages        = {56--66},
  publisher    = {{ACM}},
  year         = {2025},
  url          = {https://doi.org/10.1145/3706628.3708866},
  doi          = {10.1145/3706628.3708866},
  timestamp    = {Fri, 07 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/XuJZBBS25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChengWJBS25,
  author       = {Jianyi Cheng and
                  Lianghui Wang and
                  Zijian Jiang and
                  Yungang Bao and
                  Kan Shi},
  editor       = {Andrew Putnam and
                  Jing Li},
  title        = {Latency Insensitivity Testing for Dataflow {HLS} Designs},
  booktitle    = {Proceedings of the 2025 {ACM/SIGDA} International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2025, Monterey, CA, USA, 27 February
                  2025 - 1 March 2025},
  pages        = {199--210},
  publisher    = {{ACM}},
  year         = {2025},
  url          = {https://doi.org/10.1145/3706628.3708872},
  doi          = {10.1145/3706628.3708872},
  timestamp    = {Fri, 07 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ChengWJBS25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/usenix/ChangZ0XSSBW25,
  author       = {Zihao Chang and
                  Jiaqi Zhu and
                  Haifeng Sun and
                  Yunlong Xie and
                  Kan Shi and
                  Ninghui Sun and
                  Yungang Bao and
                  Sa Wang},
  editor       = {Deniz Altinb{\"{u}}ken and
                  Ryan Stutsman},
  title        = {Poby: SmartNIC-accelerated Image Provisioning for Coldstart in Clouds},
  booktitle    = {Proceedings of the 2025 {USENIX} Annual Technical Conference, {USENIX}
                  {ATC} 2025, Boston, MA, USA, July 7-9, 2025},
  pages        = {19--37},
  publisher    = {{USENIX} Association},
  year         = {2025},
  url          = {https://www.usenix.org/conference/atc25/presentation/chang},
  timestamp    = {Thu, 17 Jul 2025 16:58:23 +0200},
  biburl       = {https://dblp.org/rec/conf/usenix/ChangZ0XSSBW25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/ZhangWLCWBBS24,
  author       = {Ziqing Zhang and
                  Weijie Weng and
                  Yaning Li and
                  Lijia Cai and
                  Haoyu Wang and
                  David Boland and
                  Yungang Bao and
                  Kan Shi},
  editor       = {Rajiv Gupta and
                  Nael B. Abu{-}Ghazaleh and
                  Madan Musuvathi and
                  Dan Tsafrir},
  title        = {Hassert: Hardware Assertion-Based Verification Framework with {FPGA}
                  Acceleration},
  booktitle    = {Proceedings of the 29th {ACM} International Conference on Architectural
                  Support for Programming Languages and Operating Systems, Volume 4,
                  {ASPLOS} 2024, Hilton La Jolla Torrey Pines, La Jolla, CA, USA, 27
                  April 2024 - 1 May 2024},
  pages        = {142--154},
  publisher    = {{ACM}},
  year         = {2024},
  url          = {https://doi.org/10.1145/3622781.3698899},
  doi          = {10.1145/3622781.3698899},
  timestamp    = {Fri, 09 May 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/asplos/ZhangWLCWBBS24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcst/XuYWWLJZZTWSSB23,
  author       = {Yinan Xu and
                  Zihao Yu and
                  Kaifan Wang and
                  Huaqiang Wang and
                  Jiawei Lin and
                  Yue Jin and
                  Linjuan Zhang and
                  Zifei Zhang and
                  Dan Tang and
                  Sa Wang and
                  Kan Shi and
                  Ninghui Sun and
                  Yungang Bao},
  title        = {Functional Verification for Agile Processor Development: {A} Case
                  for Workflow Integration},
  journal      = {J. Comput. Sci. Technol.},
  volume       = {38},
  number       = {4},
  pages        = {737--753},
  year         = {2023},
  url          = {https://doi.org/10.1007/s11390-023-3285-8},
  doi          = {10.1007/S11390-023-3285-8},
  timestamp    = {Thu, 10 Apr 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcst/XuYWWLJZZTWSSB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ShiXDBB23,
  author       = {Kan Shi and
                  Shuoxiang Xu and
                  Yuhan Diao and
                  David Boland and
                  Yungang Bao},
  editor       = {Paolo Ienne and
                  Zhiru Zhang},
  title        = {{ENCORE:} Efficient Architecture Verification Framework with {FPGA}
                  Acceleration},
  booktitle    = {Proceedings of the 2023 {ACM/SIGDA} International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2023, Monterey, CA, USA, February
                  12-14, 2023},
  pages        = {209--219},
  publisher    = {{ACM}},
  year         = {2023},
  url          = {https://doi.org/10.1145/3543622.3573187},
  doi          = {10.1145/3543622.3573187},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ShiXDBB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RuanCZS0B22,
  author       = {Jinjie Ruan and
                  Yisong Chang and
                  Ke Zhang and
                  Kan Shi and
                  Mingyu Chen and
                  Yungang Bao},
  title        = {Increasing Flexibility of Cloud {FPGA} Virtualization},
  booktitle    = {32nd International Conference on Field-Programmable Logic and Applications,
                  {FPL} 2022, Belfast, United Kingdom, August 29 - Sept. 2, 2022},
  pages        = {350--357},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/FPL57034.2022.00060},
  doi          = {10.1109/FPL57034.2022.00060},
  timestamp    = {Tue, 21 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpl/RuanCZS0B22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/XuYTCCGJLLLLLLT22,
  author       = {Yinan Xu and
                  Zihao Yu and
                  Dan Tang and
                  Guokai Chen and
                  Lu Chen and
                  Lingrui Gou and
                  Yue Jin and
                  Qianruo Li and
                  Xin Li and
                  Zuojun Li and
                  Jiawei Lin and
                  Tong Liu and
                  Zhigang Liu and
                  Jiazhan Tan and
                  Huaqiang Wang and
                  Huizhe Wang and
                  Kaifan Wang and
                  Chuanqi Zhang and
                  Fawang Zhang and
                  Linjuan Zhang and
                  Zifei Zhang and
                  Yangyang Zhao and
                  Yaoyang Zhou and
                  Yike Zhou and
                  Jiangrui Zou and
                  Ye Cai and
                  Dandan Huan and
                  Zusong Li and
                  Jiye Zhao and
                  Zihao Chen and
                  Wei He and
                  Qiyuan Quan and
                  Xingwu Liu and
                  Sa Wang and
                  Kan Shi and
                  Ninghui Sun and
                  Yungang Bao},
  title        = {Towards Developing High Performance {RISC-V} Processors Using Agile
                  Methodology},
  booktitle    = {55th {IEEE/ACM} International Symposium on Microarchitecture, {MICRO}
                  2022, Chicago, IL, USA, October 1-5, 2022},
  pages        = {1178--1199},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/MICRO56248.2022.00080},
  doi          = {10.1109/MICRO56248.2022.00080},
  timestamp    = {Thu, 10 Apr 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/XuYTCCGJLLLLLLT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/ShiBC15,
  author       = {Kan Shi and
                  David Boland and
                  George A. Constantinides},
  title        = {Imprecise Datapath Design: An Overclocking Approach},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {8},
  number       = {2},
  pages        = {6:1--6:23},
  year         = {2015},
  url          = {https://doi.org/10.1145/2629527},
  doi          = {10.1145/2629527},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/ShiBC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KhursheedSAWC14,
  author       = {S. Saqib Khursheed and
                  Kan Shi and
                  Bashir M. Al{-}Hashimi and
                  Peter R. Wilson and
                  Krishnendu Chakrabarty},
  title        = {Delay Test for Diagnosis of Power Switches},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {22},
  number       = {2},
  pages        = {197--206},
  year         = {2014},
  url          = {https://doi.org/10.1109/TVLSI.2013.2239319},
  doi          = {10.1109/TVLSI.2013.2239319},
  timestamp    = {Sat, 31 May 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/KhursheedSAWC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ShiBSBC14,
  author       = {Kan Shi and
                  David Boland and
                  Edward A. Stott and
                  Samuel Bayliss and
                  George A. Constantinides},
  title        = {Datapath Synthesis for Overclocking: Online Arithmetic for Latency-Accuracy
                  Trade-offs},
  booktitle    = {The 51st Annual Design Automation Conference 2014, {DAC} '14, San
                  Francisco, CA, USA, June 1-5, 2014},
  pages        = {190:1--190:6},
  publisher    = {{ACM}},
  year         = {2014},
  url          = {https://doi.org/10.1145/2593069.2593118},
  doi          = {10.1145/2593069.2593118},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/ShiBSBC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/ShiBC14,
  author       = {Kan Shi and
                  David Boland and
                  George A. Constantinides},
  editor       = {Jialin Chen and
                  Wenbo Yin and
                  Yuichiro Shibata and
                  Lingli Wang and
                  Hayden Kwok{-}Hay So and
                  Yuchun Ma},
  title        = {Efficient {FPGA} implementation of digit parallel online arithmetic
                  operators},
  booktitle    = {2014 International Conference on Field-Programmable Technology, {FPT}
                  2014, Shanghai, China, December 10-12, 2014},
  pages        = {115--122},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/FPT.2014.7082763},
  doi          = {10.1109/FPT.2014.7082763},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/fpt/ShiBC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fskd/LiuSX14,
  author       = {Xiaoqian Liu and
                  Kan Shi and
                  Lei Xing},
  title        = {Combining grey systems theory and entropy method to evaluate the organizational
                  health},
  booktitle    = {11th International Conference on Fuzzy Systems and Knowledge Discovery,
                  {FSKD} 2014, Xiamen, China, August 19-21, 2014},
  pages        = {661--665},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/FSKD.2014.6980913},
  doi          = {10.1109/FSKD.2014.6980913},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/fskd/LiuSX14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ShiBC13,
  author       = {Kan Shi and
                  David Boland and
                  George A. Constantinides},
  title        = {Accuracy-Performance Tradeoffs on an {FPGA} through Overclocking},
  booktitle    = {21st {IEEE} Annual International Symposium on Field-Programmable Custom
                  Computing Machines, {FCCM} 2013, Seattle, WA, USA, April 28-30, 2013},
  pages        = {29--36},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/FCCM.2013.10},
  doi          = {10.1109/FCCM.2013.10},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fccm/ShiBC13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShiBC13,
  author       = {Kan Shi and
                  David Boland and
                  George A. Constantinides},
  title        = {Overclocking datapath for latency-error tradeoff},
  booktitle    = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
                  Beijing, China, May 19-23, 2013},
  pages        = {2537--2540},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISCAS.2013.6572395},
  doi          = {10.1109/ISCAS.2013.6572395},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ShiBC13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/complex/ZhengSL09,
  author       = {Rui Zheng and
                  Kan Shi and
                  Shu Li},
  editor       = {Jie Zhou},
  title        = {The Influence Factors and Mechanism of Societal Risk Perception},
  booktitle    = {Complex Sciences, First International Conference, Complex 2009, Shanghai,
                  China, February 23-25, 2009. Revised Papers, Part 2},
  series       = {Lecture Notes of the Institute for Computer Sciences, Social Informatics
                  and Telecommunications Engineering},
  volume       = {5},
  pages        = {2266--2275},
  publisher    = {Springer},
  year         = {2009},
  url          = {https://doi.org/10.1007/978-3-642-02469-6\_104},
  doi          = {10.1007/978-3-642-02469-6\_104},
  timestamp    = {Sat, 24 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/complex/ZhengSL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}