A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology. - Zhang, Bo; Vasani, Anand; Sinha, Ashutosh; Nilchi, Alireza; Tong, Haitao; Rao, Lakshmi P.; Khanoyan, Karapet; Hatamkhani, Hamid; Yang, Xiaochen; Meng, Xin; Wong, Alexander; Kim, Jun; et al. (IEEE J. Solid State Circuits, 2024)

A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology. - Zhang, Bo; Vasani, Anand; Sinha, Ashutosh; Nilchi, Alireza; Tong, Haitao; Rao, Lakshmi P.; Khanoyan, Karapet; Hatamkhani, Hamid; Yang, Xiaochen; Meng, Xin; Wong, Alexander; Kim, Jun; et al. (2023)

A 10.3GS/s 6b flash ADC for 10G Ethernet applications. - Verma, Shwetabh; Kasapi, Athos; Lee, Li-min; Liu, Dean; Loizos, Dimitri; Paik, Song-Hee; Varzaghani, Aida; Zogopoulos, Sotirios; Sidiropoulos, Stefanos (2013)

An integrated VCSEL driver for 10Gb ethernet in 0.13µm CMOS. - Rabii, Shahriar; Acharya, Nikhil; Chau, Pak; Dao, Joseph; Feldman, Arnold; Liaw, Haw-Jyh; Liu, Dean; Loinaz, Marc; Luschas, Manuel; Salleh, Azmeer; Sheth, Siddharth; Sidiropoulos, Stefanos; et al. (2006)

Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS. - Mai, Ken; Ho, Ron; Alon, Elad; Liu, Dean; Kim, Younggon; Patil, Dinesh; Horowitz, Mark A. (IEEE J. Solid State Circuits, 2005)

A Framework for Designing Reusable Analog Circuits. - Liu, Dean; Sidiropoulos, Stefanos; Horowitz, Mark (2003)

Fast frequency acquisition phase-frequency detectors for Gsamples/s phase-locked loops. - Mansuri, Mozhgan; Liu, Dean; Yang, Chih-Kong Ken (IEEE J. Solid State Circuits, 2002)

Macro-modeling concepts for the chip electrical interface. - Amick, Brian W.; Gauthier, Claude R.; Liu, Dean (2002)

Analysis of Blocking Dynamic Circuits. - Thorp, Tyler; Liu, Dean (2002)

IC Power Distribution Challenges. - Bobba, Sudhakar; Thorp, Tyler; Aingaran, Kathirgamar; Liu, Dean (2001)

A variable-frequency parallel I/O interface with adaptive power-supply regulation. - Wei, Gu-Yeon; Kim, Jaeha; Liu, Dean; Sidiropoulos, Stefanos; Horowitz, Mark A. (IEEE J. Solid State Circuits, 2000)

Timing analysis including clock skew. - Harris, David L.; Horowitz, Mark; Liu, Dean (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)