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2010 – 2019
- 2016
[j4]Georg Hager
, Jan Treibig, Johannes Habich, Gerhard Wellein:
Exploring performance and power properties of modern multi-core chips via simple machine models. Concurr. Comput. Pract. Exp. 28(2): 189-210 (2016)- 2015
- [b1]Johannes Habich:
A performance engineering process for developing high performance lattice Boltzmann implementations (Ein Performance-Engineering-Prozess zur Entwicklung hochperformanter Lattice-Boltzmann-Implementierungen). University of Erlangen-Nuremberg, 2015, pp. 1-184 - [j3]Christian Feichtinger, Johannes Habich, Harald Köstler, Ulrich Rüde, Takayuki Aoki:
Performance modeling and analysis of heterogeneous lattice Boltzmann simulations on CPU-GPU clusters. Parallel Comput. 46: 1-13 (2015) - 2012
- [i3]Georg Hager, Jan Treibig, Johannes Habich, Gerhard Wellein:
Exploring performance and power properties of modern multicore chips via simple machine models. CoRR abs/1208.2908 (2012) - 2011
- [j2]Johannes Habich, Thomas Zeiser, Georg Hager, Gerhard Wellein:
Performance analysis and optimization strategies for a D3Q19 lattice Boltzmann kernel on nVIDIA GPUs using CUDA. Adv. Eng. Softw. 42(5): 266-272 (2011) - [j1]Christian Feichtinger, Johannes Habich, Harald Köstler, Georg Hager, Ulrich Rüde, Gerhard Wellein:
A flexible Patch-based lattice Boltzmann parallelization approach for heterogeneous GPU-CPU clusters. Parallel Comput. 37(9): 536-549 (2011) - [i2]Johannes Habich, Christian Feichtinger, Harald Köstler, Georg Hager, Gerhard Wellein:
Performance engineering for the Lattice Boltzmann method on GPGPUs: Architectural requirements and performance results. CoRR abs/1112.0850 (2011) - 2010
- [i1]Christian Feichtinger, Johannes Habich, Harald Köstler, Georg Hager, Ulrich Rüde, Gerhard Wellein:
A Flexible Patch-Based Lattice Boltzmann Parallelization Approach for Heterogeneous GPU-CPU Clusters. CoRR abs/1007.1388 (2010)
Coauthor Index
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