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Hongyi Lu
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2020 – today
- 2024
- [j2]Hongyi Lu
, Zhibo Liu
, Shuai Wang
, Fengwei Zhang
:
DTD: Comprehensive and Scalable Testing for Debuggers. Proc. ACM Softw. Eng. 1(FSE): 1172-1193 (2024) - [c22]Yelai Feng
, Huaixi Wang
, Yining Zhu
, Xiandong Liu
, Hongyi Lu
, Qing Liu
:
DAWN: Matrix Operation-Optimized Algorithm for Shortest Paths Problem on Unweighted Graphs. ICS 2024: 1-13 - [c21]Hongyi Lu, Shuai Wang, Yechang Wu, Wanning He, Fengwei Zhang:
MOAT: Towards Safe BPF Kernel Extension. USENIX Security Symposium 2024 - 2023
- [c20]Wanning He
, Hongyi Lu
, Fengwei Zhang
, Shuai Wang
:
RingGuard: Guard io_uring with eBPF. eBPF@SIGCOMM 2023: 56-62 - [i2]Hongyi Lu, Shuai Wang, Yechang Wu, Wanning He, Fengwei Zhang:
MOAT: Towards Safe BPF Kernel Extension. CoRR abs/2301.13421 (2023) - 2022
- [c19]Hongyi Lu
, Fengwei Zhang:
Raven: a novel kernel debugging tool on RISC-V. DAC 2022: 1039-1044 - [i1]Yelai Feng, Huaixi Wang, Hongyi Lu, Chao Chang, Lei Luo, Fang Yang:
A Novel Faster All-Pair Shortest Path Algorithm Based on the Matrix Multiplication for GPUs. CoRR abs/2208.04514 (2022) - 2021
- [c18]Xiang Hou, Rui Xu, Sheng Ma, Qiong Wang, Wei Jiang, Hongyi Lu:
Co-designing the Topology/Algorithm to Accelerate Distributed Training. ISPA/BDCloud/SocialCom/SustainCom 2021: 1010-1018 - [c17]Wei Jiang, Rui Xu, Sheng Ma, Qiong Wang, Xiang Hou, Hongyi Lu:
A Memory Saving Mechanism Based on Data Transferring for Pipeline Parallelism. ISPA/BDCloud/SocialCom/SustainCom 2021: 1230-1235 - [c16]Haonan Li, Weijie Huang
, Mingde Ren, Hongyi Lu, Zhenyu Ning
, Heming Cui, Fengwei Zhang:
A Novel Memory Management for RISC-V Enclaves. HASP@MICRO 2021: 3:1-3:9 - [c15]Hongyi Lu, Yechang Wu, Shuqing Li, You Lin, Chaozu Zhang, Fengwei Zhang:
BADUSB-C: Revisiting BadUSB with Type-C. SP (Workshops) 2021: 327-338
2010 – 2019
- 2018
- [c14]Sheng Ma, Hongyi Lu, Libo Huang, Li Shen, Yang Guo, Zhiying Wang, Wenliang Xue:
Adaptive VC Partitioning for NoCs in GPGPUs. ISCAS 2018: 1-5 - 2015
- [c13]Peng Wang, Sheng Ma, Hongyi Lu, Zhiying Wang, Chen Li:
Adaptive remaining hop count flow control: Consider the interaction between packets. ASP-DAC 2015: 54-60 - 2014
- [j1]Peng Wang, Sheng Ma, Hongyi Lu, Zhiying Wang:
A comprehensive comparison between virtual cut-through and wormhole routers for cache coherent Network on-Chips. IEICE Electron. Express 11(14): 20140496 (2014) - 2012
- [c12]Wenwei Qiu, Nong Xiao, Hongyi Lu, Zhen Sun:
The Design of Experimental Nodes on Teaching Platform of Cloud Laboratory (TPCL). FGIT-EL/DTA/UNESST 2012: 1-7 - 2011
- [c11]Libo Huang, Zhiying Wang, Li Shen, Hongyi Lu, Nong Xiao, Cong Liu:
A specialized low-cost vectorized loop buffer for embedded processors. DATE 2011: 1200-1203 - 2010
- [c10]Wei Shi, Zhiying Wang, Hongguang Ren, Ting Cao, Wei Chen, Bo Su, Hongyi Lu:
DSS: Applying asynchronous techniques to architectures exploiting ILP at compile time. ICCD 2010: 321-327
2000 – 2009
- 2009
- [c9]Wei Chen, Zhiying Wang, Hongyi Lu, Li Shen, Nong Xiao, Zhong Zheng:
A Hardware Approach for Reducing Interpretation Overhead. CIT (1) 2009: 98-103 - [c8]Wei Chen, Li Shen, Hongyi Lu, Zhiying Wang, Nong Xiao:
A Light-weight Code Cache Design for Dynamic Binary Translation. ICPADS 2009: 120-125 - [c7]Wei Chen, Hongyi Lu, Li Shen, Zhiying Wang, Nong Xiao:
Using Pcache to Speedup Interpretation in Dynamic Binary Translation. ISPA 2009: 525-530 - 2008
- [c6]Ming-che Lai, Zhiying Wang, Lei Gao, Hongyi Lu, Kui Dai:
A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers. DAC 2008: 630-633 - [c5]Wei Chen, Hongyi Lu, Li Shen, Zhiying Wang, Nong Xiao:
DBTIM: An Advanced Hardware Assisted Full Virtualization Architecture. EUC (2) 2008: 399-404 - [c4]Wei Chen, Hongyi Lu, Li Shen, Zhiying Wang, Nong Xiao, Dan Chen:
A Novel Hardware Assisted Full Virtualization Technique. ICYCS 2008: 1292-1297 - 2006
- [c3]Yuan-man Tong, Zhiying Wang, Kui Dai, Hongyi Lu:
Designing Power Analysis Resistant and High Performance Block Cipher Coprocessor Using WDDL and Wave-Pipelining. Inscrypt 2006: 66-77 - [c2]Xue-mi Zhao, Zhiying Wang, Hongyi Lu, Kui Dai:
A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology. VLSI-SoC 2006: 216-221 - 2004
- [c1]Lei Wang, Hongyi Lu, Kui Dai, Zhiying Wang:
TengYue-1TengYue: In Chinese means jump over.: A High Performance Embedded SoC. Asia-Pacific Computer Systems Architecture Conference 2004: 126-136
Coauthor Index
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last updated on 2024-08-03 20:16 CEST by the dblp team
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