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2020 – today
- 2023
[i1]Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie:
Locality and Utilization in Placement Suboptimality. CoRR abs/2305.16413 (2023)
2010 – 2019
- 2018
- [p3]Jason Cong, Joseph R. Shinnerl:
Large-Scale Global Placement. Handbook of Approximation Algorithms and Metaheuristics (2) 2018 - 2015
- [j5]Tao Lin, Chris C. N. Chu, Joseph R. Shinnerl, Ismail Bustany, Ivailo Nedelchev:
POLAR: A High Performance Mixed-Size Wirelengh-Driven Placer With Density Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(3): 447-459 (2015) - [c11]Ismail S. Bustany, David G. Chinnery
, Joseph R. Shinnerl, Vladimir Yutsis:
ISPD 2015 Benchmarks with Fence Regions and Routing Blockages for Detailed-Routing-Driven Placement. ISPD 2015: 157-164 - 2014
- [c10]Vladimir Yutsis, Ismail Bustany, David G. Chinnery, Joseph R. Shinnerl, Wen-Hao Liu:
ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement. ISPD 2014: 161-168 - 2013
- [c9]Tao Lin, Chris Chu, Joseph R. Shinnerl, Ismail Bustany, Ivailo Nedelchev:
POLAR: placement based on novel rough legalization and refinement. ICCAD 2013: 357-362
2000 – 2009
- 2008
- [r2]Jason Cong, Joseph R. Shinnerl:
Enhancing Placement with Multilevel Techniques. Handbook of Algorithms for Physical Design Automation 2008 - 2007
- [p2]Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie:
Locality and Utilization in Placement Suboptimality. Modern Circuit Placement 2007: 13-36 - [p1]Tony F. Chan, Kenton Sze, Joseph R. Shinnerl, Min Xie:
mPL6: Enhanced Multilevel Mixed-Size Placement with Congestion Control. Modern Circuit Placement 2007: 247-288 - [r1]Joseph R. Shinnerl, Jason Cong:
Large-Scale Global Placement. Handbook of Approximation Algorithms and Metaheuristics 2007 - 2006
- [j4]Jason Cong, Michail Romesis, Joseph R. Shinnerl:
Fast floorplanning by look-ahead enabled recursive bipartitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9): 1719-1732 (2006) - [c8]Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kenton Sze, Min Xie:
mPL6: enhanced multilevel mixed-size placement. ISPD 2006: 212-214 - 2005
- [j3]Jason Cong, Joseph R. Shinnerl, Min Xie, Tim Kong, Xin Yuan:
Large-scale circuit placement. ACM Trans. Design Autom. Electr. Syst. 10(2): 389-430 (2005) - [c7]Jason Cong, Michail Romesis, Joseph R. Shinnerl:
Fast floorplanning by look-ahead enabled recursive bipartitioning. ASP-DAC 2005: 1119-1122 - [c6]Jason Cong, Michail Romesis, Joseph R. Shinnerl:
Robust mixed-size placement under tight white-space constraints. ICCAD 2005: 165-172 - [c5]Tony F. Chan, Jason Cong, Michail Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie:
mPL6: a robust multilevel mixed-size placement engine. ISPD 2005: 227-229 - 2004
- [c4]Jason Cong, Gabriele Nataneli, Michail Romesis, Joseph R. Shinnerl:
An area-optimality study of floorplanning. ISPD 2004: 78-83 - 2003
- [c3]Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shinnerl, Kenton Sze:
An Enhanced Multilevel Algorithm for Circuit Placement. ICCAD 2003: 299-306 - [c2]Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie, Xin Yuan:
Large-Scale Circuit Placement: Gap and Promise. ICCAD 2003: 883-890 - 2000
- [c1]Tony F. Chan, Jason Cong, Tianming Kong, Joseph R. Shinnerl:
Multilevel Optimization for Large-Scale Circuit Placement. ICCAD 2000: 171-176
1990 – 1999
- 1996
- [j2]Philip E. Gill, Michael A. Saunders, Joseph R. Shinnerl:
On the Stability of Cholesky Factorization for Symmetric Quasidefinite Systems. SIAM J. Matrix Anal. Appl. 17(1): 35-46 (1996) - [j1]Anders Forsgren, Philip E. Gill, Joseph R. Shinnerl:
Stability of Symmetric Ill-Conditioned Systems Arising in Interior Methods for Constrained Optimization. SIAM J. Matrix Anal. Appl. 17(1): 187-211 (1996)
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