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ORCIDAvinash Karanth
Avinash Karanth Kodi – Avinash Kodi
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- affiliation: Ohio University
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2020 – today
- 2025
[j37]Garett Cunningham, Siqin Liu, Harsha Chenji, David Juedes, Avinash Karanth:
Language semantics to support secure computation and communication in embedded systems via hardware monitors. Integr. 102: 102367 (2025)- 2024
- [j36]Avinash Karanth:
Editorial: EiC Farewell and Introduction of new EiC. IEEE Trans. Computers 73(1): 1-2 (2024) - [j35]Yuan Li
, Ahmed Louri, Avinash Karanth:
A High-Performance and Energy-Efficient Photonic Architecture for Multi-DNN Acceleration. IEEE Trans. Parallel Distributed Syst. 35(1): 46-58 (2024) - [c78]Garett Cunningham, Harsha Chenji, David Juedes, Avinash Karanth:
d-GUARD: Thwarting Denial-of-Service Attacks via Hardware Monitoring of Information Flow using Language Semantics in Embedded Systems. ASPDAC 2024: 939-944 - [c77]Siqin Liu, Saumya Chauhan, Avinash Karanth:
SNAC: Mitigation of Snoop-Based Attacks with Multi-Tier Security in NoC Architectures. ACM Great Lakes Symposium on VLSI 2024: 560-563 - [c76]Siqin Liu, Prakash Chand Kuve, Avinash Karanth:
HSCONN: Hardware-Software Co-Optimization of Self-Attention Neural Networks for Large Language Models. ACM Great Lakes Symposium on VLSI 2024: 736-741 - [c75]Andy Wolff, Avinash Karanth:
Training Photonic Mach Zehnder Meshes for Neural Network Acceleration. HiPC 2024: 210-220 - [c74]Juliana Curry, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu:
PCM Enabled Low-Power Photonic Accelerator for Inference and Training on Edge Devices. IPDPS (Workshops) 2024: 600-607 - [c73]Siqin Liu, Avinash Karanth:
SCORCH: Neural Architecture Search and Hardware Accelerator Co-design with Reinforcement Learning. ISQED 2024: 1-8 - [i2]Youssef A. Ait Alama, Sampada Sakpal, Ke Wang, Razvan C. Bunescu, Avinash Karanth, Ahmed Louri:
Algorithmic Strategies for Sustainable Reuse of Neural Network Accelerators with Permanent Faults. CoRR abs/2412.16208 (2024) - 2023
- [c72]Yuan Li, Ahmed Louri, Avinash Karanth:
A Silicon Photonic Multi-DNN Accelerator. PACT 2023: 238-249 - [c71]Kyle Shiflett, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri:
Flumen: Dynamic Processing in the Photonic Interconnect. ISCA 2023: 75:1-75:13 - [c70]Garret Cunningham, Harsha Chenji, David Juedes, Gordon Stewart, Avinash Karanth:
DAGGER: Exploiting Language Semantics for Program Security in Embedded Systems. ISQED 2023: 1-7 - [c69]Chad Mourning, Harsha Chenji, Allyson Hallman-Thrasher, Savas Kaya, Nasseef Abukamail, David Juedes, Avinash Karanth:
Reflections of Cybersecurity Workshop for K-12 Teachers. SIGCSE (1) 2023: 987-993 - [i1]Quintin Fettes, Avinash Karanth, Razvan C. Bunescu, Brandon Beckwith, Sreenivas Subramoney:
Reclaimer: A Reinforcement Learning Approach to Dynamic Resource Allocation for Cloud Microservices. CoRR abs/2304.07941 (2023) - 2022
- [j34]Yuan Li, Ke Wang, Hao Zheng, Ahmed Louri, Avinash Karanth:
Ascend: A Scalable and Energy-Efficient Deep Neural Network Accelerator With Photonic Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2730-2741 (2022) - [j33]Siqin Liu, Talha Furkan Canan, Harshavardhan Chenji, Soumyasanta Laha, Savas Kaya, Avinash Karanth:
Exploiting Wireless Technology for Energy-Efficient Accelerators With Multiple Dataflows and Precision. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2742-2755 (2022) - [j32]Padmaja Bhamidipati, Avinash Karanth:
HREN: A Hybrid Reliable and Energy-Efficient Network-on-Chip Architecture. IEEE Trans. Emerg. Top. Comput. 10(2): 537-548 (2022) - [j31]Yuan Li, Ahmed Louri, Avinash Karanth:
SPRINT: A High-Performance, Energy-Efficient, and Scalable Chiplet-Based Accelerator With Photonic Interconnects for CNN Inference. IEEE Trans. Parallel Distributed Syst. 33(10): 2332-2345 (2022) - [c68]Yuan Li, Ahmed Louri, Avinash Karanth:
SPACX: Silicon Photonics-based Scalable Chiplet Accelerator for DNN Inference. HPCA 2022: 831-845 - [c67]Chad Mourning, David Juedes, Allyson Hallman-Thrasher, Harsha Chenji, Savas Kaya, Avinash Karanth:
Reflections of Cybersecurity Workshop for K-12 Teachers and High School Students. SIGCSE (2) 2022: 1127 - 2021
- [c66]Yuan Li, Ahmed Louri, Avinash Karanth:
Scaling Deep-Learning Inference with Chiplet-based Architecture and Photonic Interconnects. DAC 2021: 931-936 - [c65]Kyle Shiflett, Avinash Karanth, Ahmed Louri, Razvan C. Bunescu:
Bitwise Neural Network Acceleration Using Silicon Photonics. ACM Great Lakes Symposium on VLSI 2021: 9-14 - [c64]Siqin Liu, Avinash Karanth:
Dynamic Voltage and Frequency Scaling to Improve Energy-Efficiency of Hardware Accelerators. HiPC 2021: 232-241 - [c63]Jiajun Li, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu:
CSCNN: Algorithm-hardware Co-design for CNN Accelerators using Centrosymmetric Filters. HPCA 2021: 612-625 - [c62]Jiajun Li, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu:
GCNAX: A Flexible and Energy-efficient Accelerator for Graph Convolutional Neural Networks. HPCA 2021: 775-788 - [c61]Siqin Liu, Sushanth Karmunchi, Avinash Karanth, Soumyasanta Laha, Savas Kaya:
WiNN: Wireless Interconnect based Neural Network Accelerator. ICCD 2021: 277-284 - [c60]Kyle Shiflett, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri:
Albireo: Energy-Efficient Acceleration of Convolutional Neural Networks via Silicon Photonics. ISCA 2021: 860-873 - 2020
- [j30]Xuehai Qian, Yanzhi Wang, Avinash Karanth:
Guest Editors' Introduction to the Special Issue on Machine Learning Architectures and Accelerators. IEEE Trans. Computers 69(7): 929-930 (2020) - [j29]Quintin Fettes, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri, Kyle Shiflett:
Hardware-Level Thread Migration to Reduce On-Chip Data Movement Via Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3638-3649 (2020) - [c59]Kyle Shiflett, Dylan Wright, Avinash Karanth, Ahmed Louri:
PIXEL: Photonic Neural Network Accelerator. HPCA 2020: 474-487 - [c58]Talha Furkan Canan, Savas Kaya, Avinash Karanth, Ahmed Louri:
4-Input NAND and NOR Gates Based on Two Ambipolar Schottky Barrier FinFETs. ICECS 2020: 1-4 - [c57]Mark Clark, Yingping Chen, Avinash Karanth, Dongsheng Brian Ma, Ahmed Louri:
DozzNoC: Reducing Static and Dynamic Energy in NoCs with Low-latency Voltage Regulators using Machine Learning. IPDPS 2020: 1-11 - [c56]Talha Furkan Canan, Savas Kaya, Harsha Chenji, Avinash Karanth:
Reconfigurable Gates with Sub-10nm Ambipolar SB-FinFETs for Logic Locking & Obfuscation. MWSCAS 2020: 953-956
2010 – 2019
- 2019
- [j28]Quintin Fettes, Mark Clark, Razvan C. Bunescu, Avinash Karanth, Ahmed Louri:
Dynamic Voltage and Frequency Scaling in NoCs With Supervised and Reinforcement Learning Techniques. Computer 52(9): 4-5 (2019) - [j27]Ahmed Louri, Jacques Henri Collet, Avinash Karanth:
Limit of Hardware Solutions for Self-Protecting Fault-Tolerant NoCs. ACM J. Emerg. Technol. Comput. Syst. 15(1): 4:1-4:16 (2019) - [j26]Quintin Fettes, Mark Clark, Razvan C. Bunescu, Avinash Karanth, Ahmed Louri:
Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques. IEEE Trans. Computers 68(3): 375-389 (2019) - [j25]Avinash Karanth, Savas Kaya, Md. Ashif I. Sikder, Daniel Carbaugh, Soumyasanta Laha, Dominic DiTomaso, Ahmed Louri, Hao Xin, JunQiang Wu:
Sustainability in Network-on-Chips by Exploring Heterogeneity in Emerging Technologies. IEEE Trans. Sustain. Comput. 4(3): 293-307 (2019) - [c55]Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu:
High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learnin. DATE 2019: 1166-1171 - [c54]Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu:
IntelliNoC: a holistic design framework for energy-efficient and reliable on-chip communication for manycores. ISCA 2019: 589-600 - 2018
- [j24]Scott Vanwinkle, Avinash Karanth Kodi:
SHARP: Shared Heterogeneous Architecture with Reconfigurable Photonic Network-on-Chip. ACM J. Emerg. Technol. Comput. Syst. 14(2): 25:1-25:22 (2018) - [j23]Travis Boraten, Avinash Kodi:
Mitigation of Hardware Trojan based Denial-of-Service attack for secure NoCs. J. Parallel Distributed Comput. 111: 24-38 (2018) - [j22]Travis Boraten, Avinash Karanth Kodi:
Runtime Techniques to Mitigate Soft Errors in Network-on-Chip (NoC) Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(3): 682-695 (2018) - [j21]Seaghan Sefton, Taiman Siddiqui, Nathaniel St. Amour, Gordon Stewart, Avinash Karanth Kodi:
GARUDA: Designing Energy-Efficient Hardware Monitors From High-Level Policies for Secure Information Flow. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2509-2518 (2018) - [c53]Mark Clark, Avinash Kodi, Razvan C. Bunescu, Ahmed Louri:
LEAD: learning-enabled energy-aware dynamic voltage/frequency scaling in NoCs. DAC 2018: 82:1-82:6 - [c52]Scott Van Winkle, Avinash Karanth Kodi, Razvan C. Bunescu, Ahmed Louri:
Extending the Power-Efficiency and Performance of Photonic Interconnects for Heterogeneous Multicores with Machine Learning. HPCA 2018: 480-491 - [c51]Padmaja Bhamidipati, Avinash Karanth:
RETUNES: Reliable and Energy-Efficient Network-on-Chip Architecture. ICCD 2018: 488-495 - [c50]Talha Furkan Canan, Savas Kaya, Avinash Kodi, Hao Xin, Ahmed Louri:
10T and 8T Full Adders Based on Ambipolar XOR Gates with SB-FinFETs. ICECS 2018: 577-580 - [c49]Avinash Kodi, Kyle Shifflet, Savas Kaya, Soumyasanta Laha, Ahmed Louri:
Scalable Power-Efficient Kilo-Core Photonic-Wireless NoC Architectures. IPDPS 2018: 1010-1019 - [c48]Yunus Kelestemur, Soumyasanta Laha, Savas Kaya, Avinash Kodi, Hao Xin, Ahmed Louri:
Sub-THz Tunable Push-Push Oscillators with FinFETs for Wireless NoCs. MWSCAS 2018: 332-335 - [c47]Travis H. Boraten, Avinash Karanth Kodi:
Securing NoCs Against Timing Attacks with Non-Interference Based Adaptive Routing. NOCS 2018: 14:1-14:8 - 2017
- [j20]Matthew Kennedy, Avinash Karanth Kodi:
CLAP-NET: Bandwidth adaptive optical crossbar architecture. J. Parallel Distributed Comput. 100: 130-139 (2017) - [j19]William Rayess, David W. Matolak, Savas Kaya, Avinash Karanth Kodi:
Antennas and Channel Characteristics for Wireless Networks on Chips. Wirel. Pers. Commun. 95(4): 5039-5056 (2017) - [c46]Dominic DiTomaso, Md. Ashif I. Sikder, Avinash Karanth Kodi, Ahmed Louri:
Machine learning enabled power-aware Network-on-Chip design. DATE 2017: 1354-1359 - [c45]Talha Furkan Canan, Savas Kaya, Avinash Kodi, Hao Xin, Ahmed Louri:
Ultra-compact sub-10nm logic circuits based on ambipolar SB-FinFETs. MWSCAS 2017: 100-103 - 2016
- [c44]Travis Boraten, Avinash Karanth Kodi:
Packet security with path sensitization for NoCs. DATE 2016: 1136-1139 - [c43]Juman Alshraiedeh, Avinash Kodi:
An adaptive routing algorithm to improve lifetime reliability in NoCs architecture. DFT 2016: 127-130 - [c42]Travis Boraten, Dominic DiTomaso, Avinash Karanth Kodi:
Secure Model Checkers for Network-on-Chip (NoC) Architectures. ACM Great Lakes Symposium on VLSI 2016: 45-50 - [c41]Md. Ashif I. Sikder, Avinash Kodi, William Rayess, Dominic DiTomaso, David W. Matolak, Savas Kaya:
Exploring Wireless Technology for Off-Chip Memory Access. Hot Interconnects 2016: 92-99 - [c40]Travis Boraten, Avinash Karanth Kodi:
Mitigation of Denial of Service Attack with Hardware Trojans in NoC Architectures. IPDPS 2016: 1091-1100 - [c39]Dominic DiTomaso, Travis Boraten, Avinash Kodi, Ahmed Louri:
Dynamic error mitigation in NoCs using intelligent prediction techniques. MICRO 2016: 31:1-31:12 - [c38]Md. Ashif I. Sikder, Avinash Karanth Kodi, Ahmed Louri:
Reconfigurable Optical and Wireless (R-OWN) Network-on-Chip for High Performance Computing. NANOCOM 2016: 25:1-25:6 - 2015
- [j18]Dominic DiTomaso, Avinash Karanth Kodi, Ahmed Louri, Razvan C. Bunescu:
Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures. IEEE Trans. Computers 64(12): 3555-3568 (2015) - [j17]Soumyasanta Laha, Savas Kaya, David W. Matolak, William Rayess, Dominic DiTomaso, Avinash Karanth Kodi:
A New Frontier in Ultralow Power Wireless Links: Network-on-Chip and Chip-to-Chip Interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(2): 186-198 (2015) - [j16]Dominic DiTomaso, Avinash Karanth Kodi, David W. Matolak, Savas Kaya, Soumyasanta Laha, William Rayess:
A-WiNoC: Adaptive Wireless Network-on-Chip Architecture for Chip Multiprocessors. IEEE Trans. Parallel Distributed Syst. 26(12): 3289-3302 (2015) - [c37]Brian Neel, Matthew Kennedy, Avinash Karanth Kodi:
Dynamic Power Reduction Techniques in On-Chip Photonic Interconnects. ACM Great Lakes Symposium on VLSI 2015: 249-252 - [c36]Matthew Kennedy, Avinash Karanth Kodi:
Cross-Chip: Low power processor-to-memory nanophotonic interconnect architecture. IGSC 2015: 1-6 - [c35]Avinash Karanth Kodi, Brian Neel, William C. Brantley:
Power and performance analysis of scalable photonic networks for exascale architecture. IGSC 2015: 1-8 - [c34]Md. Ashif I. Sikder, Avinash Karanth Kodi, Matthew Kennedy, Savas Kaya, Ahmed Louri:
OWN: Optical and Wireless Network-on-Chip for Kilo-core Architectures. Hot Interconnects 2015: 44-51 - [c33]Avinash Karanth Kodi, Md. Ashif I. Sikder, Dominic DiTomaso, Savas Kaya, Soumyasanta Laha, David W. Matolak, William Rayess:
Kilo-core Wireless Network-on-Chips (NoCs) Architectures. NANOCOM 2015: 33:1-33:6 - [c32]Matthew Kennedy, Avinash Karanth Kodi:
Bandwidth Adaptive Nanophotonic Crossbars with Clockwise/Counter-clockwise Optical Routing. VLSID 2015: 123-128 - 2014
- [j15]Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Roveda:
Workload assignment considering NBTI degradation in multicore systems. ACM J. Emerg. Technol. Comput. Syst. 10(1): 4:1-4:22 (2014) - [j14]Avinash Karanth Kodi, Brian Neel, William C. Brantley:
Photonic Interconnects for Exascale and Datacenter Architectures. IEEE Micro 34(5): 18-30 (2014) - [j13]Randy Morris, Avinash Karanth Kodi, Ahmed Louri, Ralph D. Whaley:
Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration. IEEE Trans. Computers 63(1): 243-255 (2014) - [j12]Randy Morris, Evan Jolley, Avinash Karanth Kodi:
Extending the Performance and Energy-Efficiency of Shared Memory Multicores with Nanophotonic Technology. IEEE Trans. Parallel Distributed Syst. 25(1): 83-92 (2014) - [c31]Dominic DiTomaso, Avinash Karanth Kodi, Ahmed Louri:
QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers. HPCA 2014: 320-331 - 2013
- [j11]David W. Matolak, Savas Kaya, Avinash Karanth Kodi:
Channel modeling for wireless networks-on-chips. IEEE Commun. Mag. 51(6) (2013) - [j10]Dominic DiTomaso, Randy Morris, Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri:
Extending the Energy Efficiency and Performance With Channel Buffers, Crossbars, and Topology Analysis for Network-on-Chips. IEEE Trans. Very Large Scale Integr. Syst. 21(11): 2141-2154 (2013) - [c30]Travis Boraten, Avinash Karanth Kodi:
Energy-efficient Runtime Adaptive Scrubbing in fault-tolerant Network-on-Chips (NoCs) architectures. ICCD 2013: 264-271 - [c29]Dominic DiTomaso, Randy Morris, Evan Jolley, Ashwini Sarathy, Ahmed Louri, Avinash Karanth Kodi:
Design of a Concentrated Torus Topology with Channel Buffers and Efficient Crossbars in NoCs. IPDPS Workshops 2013: 876-883 - [c28]Savas Kaya, Soumyasanta Laha, Avinash Kodi, Dominic DiTomaso, David Matolak, William Rayess:
On ultra-short wireless interconnects for NoCs and SoCs: Bridging the 'THz Gap'. MWSCAS 2013: 804-808 - [c27]Dominic DiTomaso, Avinash Karanth Kodi, David W. Matolak, Savas Kaya, Soumyasanta Laha, William Rayess:
Energy-efficient adaptive wireless NoCs architecture. NOCS 2013: 1-8 - [c26]Li Zhou, Avinash Karanth Kodi:
PROBE: Prediction-based optical bandwidth scaling for energy-efficient NoCs. NOCS 2013: 1-8 - [c25]Randy Morris, Avinash Karanth Kodi, Ahmed Louri:
Evaluating the scalability and performance of 3D stacked reconfigurable nanophotonic interconnects. SLIP 2013: 1 - 2012
- [j9]Brian Neel, Randy Morris, Dominic DiTomaso, Avinash Kodi:
SPRINT: Scalable Photonic Switching Fabric for High-Performance Computing (HPC). JOCN 4(9): A38-A47 (2012) - [j8]David W. Matolak, Avinash Karanth Kodi, Savas Kaya, Dominic DiTomaso, Soumyasanta Laha, William Rayess:
Wireless networks-on-chips: architecture, wireless channel, and devices. IEEE Wirel. Commun. 19(5): 58-65 (2012) - [c24]Brian Neel, Randy Morris, Dominic DiTomaso, Avinash Karanth Kodi:
Power efficient photonic networks for many-core architectures. IGCC 2012: 1-6 - [c23]Randy Morris, Avinash Karanth Kodi, Ahmed Louri:
3D-NoC: Reconfigurable 3D photonic on-chip interconnect for multicores. ICCD 2012: 413-418 - [c22]Yixuan Zhang, Randy Morris, Dominic DiTomaso, Avinash Karanth Kodi:
Energy-Efficient and Fault-Tolerant Unified Buffer and Bufferless Crossbar Architecture for NoCs. IPDPS Workshops 2012: 972-981 - [c21]Randy Morris, Avinash Karanth Kodi, Ahmed Louri:
Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance. MICRO 2012: 282-293 - [c20]Dominic DiTomaso, Travis Boraten, Avinash Kodi, Ahmed Louri:
Evaluation of fault tolerant channel buffers for improving reliability in NoCs. MWSCAS 2012: 182-185 - [c19]Dominic DiTomaso, Soumyasanta Laha, Avinash Kodi, Savas Kaya, David Matolak:
Evaluation and performance analysis of energy efficient wireless NoC architecture. MWSCAS 2012: 798-801 - [c18]Dominic DiTomaso, Soumyasanta Laha, Savas Kaya, David W. Matolak, Avinash Kodi:
Energy efficient modulation for a wireless network-on-chip architecture. NEWCAS 2012: 489-492 - 2011
- [j7]Ahmed Louri, Avinash Karanth Kodi:
Introduction to the special issue on Networks-on-Chip (NoC) of the Journal of Parallel and Distributed Computing (JPDC). J. Parallel Distributed Comput. 71(5): 623-624 (2011) - [j6]Yixuan Zhang, Randy Wayne Morris Jr., Avinash Karanth Kodi:
Design of a performance enhanced and power reduced dual-crossbar Network-on-Chip (NoC) architecture. Microprocess. Microsystems 35(2): 110-118 (2011) - [c17]Dominic DiTomaso, Avinash Karanth Kodi, Savas Kaya, David W. Matolak:
iWISE: Inter-router Wireless Scalable Express Channels for Network-on-Chips (NoCs) Architecture. Hot Interconnects 2011: 11-18 - [c16]Avinash Karanth Kodi, Randy Morris, Dominic DiTomaso, Ashwini Sarathy, Ahmed Louri:
Co-design of channel buffers and crossbar organizations in NoCs architectures. ICCAD 2011: 219-226 - 2010
- [j5]Ahmed Louri, Avinash Karanth Kodi:
Special Issue on Network-on-Chips (NoCs). J. Parallel Distributed Comput. 70(1): 69 (2010) - [c15]Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang:
Workload capacity considering NBTI degradation in multi-core systems. ASP-DAC 2010: 450-455 - [c14]Randy Wayne Morris Jr., Avinash Karanth Kodi:
Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores. NOCS 2010: 207-214
2000 – 2009
- 2009
- [c13]Avinash Karanth Kodi, Randy Morris:
Design of a scalable nanophotonic interconnect for future multicores. ANCS 2009: 113-122 - [c12]Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri, Janet Meiling Wang:
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. ASP-DAC 2009: 1-6 - [c11]Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang:
Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). ISQED 2009: 826-832 - [c10]Jin Sun, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang:
NBTI aware workload balancing in multi-core systems. ISQED 2009: 833-838 - [c9]Avinash Karanth Kodi, Randy Morris, Ahmed Louri, Xiang Zhang:
On-Chip photonic interconnects for scalable multi-core architectures. NOCS 2009: 90 - 2008
- [j4]Avinash Karanth Kodi, Ahmed Louri:
Optisim: A System Simulation Methodology for Optically Interconnected HPC Systems. IEEE Micro 28(5): 22-36 (2008) - [j3]Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri:
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis. IEEE Trans. Computers 57(9): 1169-1181 (2008) - [c8]Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri:
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures. ISCA 2008: 241-250 - 2007
- [c7]Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri:
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture. ANCS 2007: 47-56 - [c6]Chander Kochar, Avinash Karanth Kodi, Ahmed Louri:
Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring Resonators. Hot Interconnects 2007: 54-64 - [c5]Avinash Karanth Kodi, Ahmed Louri:
Power-Aware Bandwidth-Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems. IPDPS 2007: 1-10 - [c4]Avinash Karanth Kodi, Ahmed Louri:
Performance adaptive power-aware reconfigurable optical interconnects for high-performance computing (HPC) systems. SC 2007: 6 - 2006
- [b1]Avinash Karanth Kodi:
RAPID: Reconfigurable All-Photonic Interconnect for Parallel and Distributed Computers. University of Arizona, Tucson, USA, 2006 - [c3]Avinash Karanth Kodi, Ahmed Louri:
A New Dynamic Bandwidth Re-Allocation Technique in Optically Interconnected High-Performance Computing Systems. Hot Interconnects 2006: 31-36 - 2005
- [j2]Avinash Karanth Kodi, Ahmed Louri:
Design of a High-Speed Optical Interconnect for Scalable Shared-Memory Multiprocessors. IEEE Micro 25(1): 41-49 (2005) - 2004
- [j1]Ahmed Louri, Avinash Karanth Kodi:
An Optical Interconnection Network and a Modified Snooping Protocol for the Design of Large-Scale Symmetric Multiprocessors (SMPs). IEEE Trans. Parallel Distributed Syst. 15(12): 1093-1104 (2004) - [c2]Avinash Karanth Kodi, Ahmed Louri:
Design of a high-speed optical interconnect for scalable shared memory multiprocessors. Hot Interconnects 2004: 92-97 - [c1]Avinash Karanth Kodi, Ahmed Louri:
A Scalable Architecture for Distributed Shared Memory Multiprocessors Using Optical Interconnects. IPDPS 2004
Coauthor Index
[j35] [c74] [i2] [c72] [c71] [j34] [j31] [c68] [c66] [c65] [c63] [c62] [c60] [j29] [c59] [c58] [c57] [j28] [j27] [j26] [j25] [c55] [c54] [c53] [c52] [c50] [c49] [c48] [c46] [c45] [c39] [c38] [j18] [c34] [j15] [j13] [c31] [j10] [c29] [c25] [c23] [c21] [c20] [j7] [c16] [j5] [c15] [c12] [c11] [c10] [c9] [j4] [j3] [c8] [c7] [c6] [c5] [c4] [c3] [j2] [j1] [c2] [c1]
David W. Matolak
aka: David Matolak
aka: David Matolak
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Citation data
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load citations from opencitations.net
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OpenAlex data
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last updated on 2025-03-05 20:46 CET by the dblp team
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