Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC) - Thierry Devoivre; M. Lunenborg; C. Julien; J.-P. Carrere; P. Ferreira; W. J. Toren; A. VandeGoor; P. Gayet; T. Berger; O. Hinsinger; P. Vannier; Y. Trouiller; et al. (10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France, 2002)