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ORCIDXu Xu 0001
Person information
- affiliation: Synopsys Inc, Mountain View, CA, USA
- affiliation (former): University of California at San Diego, LaJolla, CA, USA
Other persons with the same name
- Xu Xu — disambiguation page
- Xu Xu 0002
![[0000-0001-5856-7737]](https://dblp.org/img/orcid-mark.12x12.png "0000-0001-5856-7737")
— Jilin University, College of Computer Science and Technology, Changchun, China - Xu Xu 0003 — University of Science and Technology of China, Department of Electronic Engineering and Information Science, Hefei, China (and 1 more)
- Xu Xu 0004 — Jilin University, College of Mathematics, Changchun, China
- Xu Xu 0005 — Sheffield Hallam University, Department of Engineering and Mathematics, UK (and 1 more)
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2010 – 2019
- 2010
[j8]Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Yao:
Layout Decomposition Approaches for Double Patterning Lithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(6): 939-952 (2010)
2000 – 2009
- 2008
- [j7]Andrew B. Kahng, Chul-Hong Park, Xu Xu:
Fast Dual-Graph-Based Hotspot Filtering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(9): 1635-1642 (2008) - [c12]Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Yao:
Layout decomposition for double patterning lithography. ICCAD 2008: 465-472 - 2007
- [j6]Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky:
Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(1): 115-126 (2007) - [j5]Andrew B. Kahng, Ion I. Mandoiu, Xu Xu, Alexander Zelikovsky:
Enhanced Design Flow and Optimizations for Multiproject Wafers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2): 301-311 (2007) - [j4]Andrew B. Kahng, Bao Liu, Xu Xu:
Statistical Timing Analysis in the Presence of Signal-Integrity Effects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(10): 1873-1877 (2007) - [c11]Bao Liu, Andrew B. Kahng, Xu Xu, Jiang Hu, Ganesh Venkataraman:
A Global Minimum Clock Distribution Network Augmentation Algorithm for Guaranteed Clock Skew Yield. ASP-DAC 2007: 24-31 - [i1]Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky:
Bright-Field AAPSM Conflict Detection and Correction. CoRR abs/0710.4661 (2007) - 2006
- [j3]Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky:
Computer-Aided Optimization of DNA Array Design and Manufacturing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(2): 305-320 (2006) - [j2]Puneet Gupta, Andrew B. Kahng, Chul-Hong Park, Kambiz Samadi, Xu Xu:
Wafer Topography-Aware Optical Proximity Correction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2747-2756 (2006) - [c10]Andrew B. Kahng, Bao Liu, Xu Xu:
Statistical gate delay calculation with crosstalk alignment consideration. ACM Great Lakes Symposium on VLSI 2006: 223-228 - [c9]Andrew B. Kahng, Bao Liu, Xu Xu:
Constructing Current-Based Gate Models Based on Existing Timing Library. ISQED 2006: 37-42 - [c8]Andrew B. Kahng, Bao Liu, Xu Xu:
Statistical crosstalk aggressor alignment aware interconnect delay calculation. SLIP 2006: 91-97 - 2005
- [c7]Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky:
Bright-Field AAPSM Conflict Detection and Correction. DATE 2005: 908-913 - [c6]Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu:
Fast and efficient phase conflict detection and correction in standard-cell layouts. ICCAD 2005: 149-156 - 2004
- [j1]Andrew B. Kahng, Xu Xu:
Local unidirectional bias for cutsize-delay tradeoff in performance-driven bipartitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(4): 464-471 (2004) - [c5]Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Xu Xu, Alexander Zelikovsky:
Multi-project reticle floorplanning and wafer dicing. ISPD 2004: 70-77 - 2003
- [c4]Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky:
Evaluation of Placement Techniques for DNA Probe Array Layout. ICCAD 2003: 262-269 - [c3]Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky:
Design Flow Enhancements for DNA Arrays. ICCD 2003: 116- - [c2]Andrew B. Kahng, Xu Xu:
Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning. ISPD 2003: 81-86 - [c1]Andrew B. Kahng, Xu Xu:
Accurate pseudo-constructive wirelength and congestion estimation. SLIP 2003: 61-68
Coauthor Index
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