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2020 – today
- 2024
[j24]Nicolas Bueno
, Fernando Castro, Luis Piñuel, José Ignacio Gómez, Francky Catthoor:
Improving the Representativeness of Simulation Intervals for the Cache Memory System. IEEE Access 12: 5973-5985 (2024)- [j23]José Luis Imaña, Luis Piñuel, Yao-Ming Kuo, Oscar Ruano, Francisco Garcia-Herrero:
Efficient Low-Latency Multiplication Architecture for NIST Trinomials With RISC-V Integration. IEEE Trans. Circuits Syst. II Express Briefs 71(8): 3915-3919 (2024) - [i4]Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal, José María Llabería:
Reuse Detector: Improving the Management of STT-RAM SLLCs. CoRR abs/2402.00533 (2024) - [i3]Nicolas Bueno, Fernando Castro, Luis Piñuel, José Ignacio Gómez Pérez, Francky Catthoor:
Improving the Representativeness of Simulation Intervals for the Cache Memory System. CoRR abs/2402.00649 (2024) - 2023
- [c33]David Mallasén, Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Luis Piñuel, Manuel Prieto-Matías:
PERCIVAL: Deploying Posits and Quire Arithmetic into the CVA6 RISC-V Core. CF 2023: 375-376 - [c32]Francisco D. Igual, Luis Piñuel, Sandra Catalán, Héctor Martínez, Adrián Castelló, Enrique S. Quintana-Ortí:
Automatic Generation of Micro-kernels for Performance Portability of Matrix Multiplication on RISC-V Vector Processors. SC Workshops 2023: 1521-1532 - 2022
- [j22]David Mallasén, Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Luis Piñuel, Manuel Prieto-Matías:
PERCIVAL: Open-Source Posit RISC-V Core With Quire Capability. IEEE Trans. Emerg. Top. Comput. 10(3): 1241-1252 (2022) - [c31]David Mallasén, Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Luis Piñuel, Manuel Prieto-Matías:
PERCIVAL: Open-Source Posit RISC-V Core With Quire Capability. ARITH 2022: 66 - [c30]David Mallasén, Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Luis Piñuel, Manuel Prieto-Matías:
Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions. DCIS 2022: 1-6 - 2021
- [c29]Sarah L. Harris, Daniel Chaver, Luis Piñuel, José Ignacio Gómez Pérez, M. Hamza Liaqat, Zubair L. Kakakhel, Olof Kindgren, Robert Owen:
RVfpga: Using a RISC-V Core Targeted to an FPGA in Computer Architecture Education. FPL 2021: 145-150 - [i2]David Mallasén, Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Luis Piñuel, Manuel Prieto:
PERCIVAL: Open-Source Posit RISC-V Core with Quire Capability. CoRR abs/2111.15286 (2021) - 2020
- [j21]Annette Eschenbach, Guillermo Yepes, Christian Tenllado, José Ignacio Gómez Pérez, Luis Piñuel, Luis F. Zarzalejo, Stefan Wilbert:
Spatio-Temporal Resolution of Irradiance Samples in Machine Learning Approaches for Irradiance Forecasting. IEEE Access 8: 51518-51531 (2020) - [c28]Leandro Ariel Libutti, Francisco D. Igual, Luis Piñuel, Laura C. De Giusti, Marcelo R. Naiouf:
Towards a Malleable Tensorflow Implementation. JCC-BD&ET 2020: 30-40
2010 – 2019
- 2018
- [j20]Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal Arnal, José María Llabería:
Reuse Detector: Improving the Management of STT-RAM SLLCs. Comput. J. 61(6): 856-880 (2018) - [j19]Rafael Caballero, Luis F. Zarzalejo, Álvaro Otero, Luis Piñuel, Stefan Wilbert:
Short term cloud nowcasting for a solar power plant based on irradiance historical data. J. Comput. Sci. Technol. 18(03): 21 (2018) - 2017
- [j18]Rodrígo González-Alberquilla, Fernando Castro, Luis Piñuel, Francisco Tirado:
CEPRAM: Compression for Endurance in PCM RAM. J. Circuits Syst. Comput. 26(11): 1750167:1-1750167:32 (2017) - 2015
- [j17]Manuel F. Dolz, Francisco D. Igual, Thomas Ludwig, Luis Piñuel, Enrique S. Quintana-Ortí:
Balancing task- and data-level parallelism to improve performance and energy consumption of matrix computations on the Intel Xeon Phi. Comput. Electr. Eng. 46: 95-111 (2015) - [j16]Francisco D. Igual, Carlos García, Guillermo Botella, Luis Piñuel, Manuel Prieto-Matías, Francisco Tirado:
Non-negative Matrix Factorization on Low-Power Architectures and Accelerators: A Comparative Study. Comput. Electr. Eng. 46: 139-156 (2015) - [j15]Roberto Rodríguez-Rodríguez, Fernando Castro, Daniel Chaver, Rekai González-Alberquilla, Luis Piñuel, Francisco Tirado:
Write-Aware Replacement Policies for PCM-Based Systems. Comput. J. 58(9): 2000-2025 (2015) - [j14]Francisco D. Igual, Luis M. Jara, José Ignacio Gómez Pérez, Luis Piñuel, Manuel Prieto-Matías:
A power measurement environment for PCIe accelerators. Comput. Sci. Res. Dev. 30(2): 115-124 (2015) - [i1]Sandra Catalán, Francisco D. Igual, Rafael Mayo, Luis Piñuel, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez:
Performance and Energy Optimization of Matrix Multiplication on Asymmetric big.LITTLE Processors. CoRR abs/1507.05129 (2015) - 2014
- [j13]Rekai González-Alberquilla, Fernando Emmanuel Frati, Luis Piñuel, Karin Strauss, Luis Ceze:
Data Race Detection with Minimal Hardware Support. Comput. J. 57(5): 675-692 (2014) - 2013
- [c27]Roberto Rodríguez-Rodríguez, Fernando Castro, Daniel Chaver, Luis Piñuel, Francisco Tirado:
Reducing writes in phase-change memory environments by using efficient cache replacement policies. DATE 2013: 93-96 - 2012
- [j12]Pablo Carazo, Rubén Apolloni, Fernando Castro, Daniel Chaver, Luis Piñuel, Francisco Tirado:
Reducing Cache Hierarchy Energy Consumption by Predicting Forwarding and Disabling Associative Sets. J. Circuits Syst. Comput. 21(7) (2012) - 2011
- [j11]Rubén Apolloni, Daniel Chaver, Fernando Castro, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Hybrid timing-address oriented load-store queue filtering for an x86 architecture. IET Comput. Digit. Tech. 5(2): 145-157 (2011) - [c26]Rodrígo González-Alberquilla, Karin Strauss, Luis Ceze, Luis Piñuel:
Accelerating Data Race Detection with Minimal Hardware Support. Euro-Par (1) 2011: 27-38 - 2010
- [j10]Rodrígo González-Alberquilla, Fernando Castro, Luis Piñuel, Francisco Tirado:
Stack filter: Reducing L1 data cache power consumption. J. Syst. Archit. 56(12): 685-695 (2010) - [c25]Pablo Carazo, Rubén Apolloni, Fernando Castro, Daniel Chaver, Luis Piñuel, Francisco Tirado:
L1 Data Cache Power Reduction Using a Forwarding Predictor. PATMOS 2010: 116-125
2000 – 2009
- 2009
- [j9]Fernando Castro, Daniel Chaver, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Using age registers for a simple load-store queue filtering. J. Syst. Archit. 55(2): 79-89 (2009) - [j8]Fernando Castro, Regana Noor, Alok Garg, Daniel Chaver, Michael C. Huang, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Replacing Associative Load Queues: A Timing-Centric Approach. IEEE Trans. Computers 58(4): 496-511 (2009) - [c24]Rodrígo González-Alberquilla, Fernando Castro, Luis Piñuel, Francisco Tirado:
Stack oriented data cache filtering. CODES+ISSS 2009: 257-266 - 2008
- [j7]Silvia Del Pino, Daniel Chaver, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Energy reduction of the fetch mechanism through dynamic adaptation. IET Comput. Digit. Tech. 2(2): 94-107 (2008) - [j6]Christian Tenllado, Javier Setoain, Manuel Prieto, Luis Piñuel, Francisco Tirado:
Parallel Implementation of the 2D Discrete Wavelet Transform on Graphics Processing Units: Filter Bank versus Lifting. IEEE Trans. Parallel Distributed Syst. 19(3): 299-310 (2008) - [c23]Koen De Bosschere, Ayal Zaks, Michael C. Huang, Luis Piñuel:
Topic 4: High Performance Architectures and Compilers. Euro-Par 2008: 315-316 - 2006
- [j5]Fernando Castro, Daniel Chaver, Luis Piñuel, Manuel Prieto, Michael C. Huang, Francisco Tirado:
A Load-Store Queue Design Based on Predictive State Filtering. J. Low Power Electron. 2(1): 27-36 (2006) - [c22]Alok Garg, Fernando Castro, Michael C. Huang, Daniel Chaver, Luis Piñuel, Manuel Prieto:
Substituting associative load queue with simple hash tables in out-of-order microprocessors. ISLPED 2006: 268-273 - [c21]Fernando Castro, Luis Piñuel, Daniel Chaver, Manuel Prieto, Michael C. Huang, Francisco Tirado:
DMDC: Delayed Memory Dependence Checking through Age-Based Filtering. MICRO 2006: 297-308 - 2005
- [c20]Christian Tenllado, Luis Piñuel, Manuel Prieto, Francisco Tirado, Francky Catthoor:
Improving superword level parallelism support in modern compilers. CODES+ISSS 2005: 303-308 - [c19]Fernando Castro, Daniel Chaver, Luis Piñuel, Manuel Prieto, Francisco Tirado, Michael C. Huang:
Load-Store Queue Management: an Energy-Efficient Design Based on a State-Filtering Mechanism.. ICCD 2005: 617-624 - [c18]Daniel Chaver, Miguel A. Rojas, Luis Piñuel, Manuel Prieto, Francisco Tirado, Michael C. Huang:
Energy-aware fetch mechanism: trace cache and BTB customization. ISLPED 2005: 42-47 - [c17]Christian Tenllado, Luis Piñuel, Manuel Prieto, Francky Catthoor:
Pack Transposition: Enhancing Superword Level Parallelism Exploitation. PARCO 2005: 573-580 - [c16]Carlos García, Christian Tenllado, Luis Piñuel, Manuel Prieto:
JPEG2000 Optimization in General Purpose Microprocessors. PARCO 2005: 599-606 - [c15]Fernando Castro, Daniel Chaver, Luis Piñuel, Manuel Prieto, Michael C. Huang, Francisco Tirado:
A Power-Efficient and Scalable Load-Store Queue Design. PATMOS 2005: 1-9 - 2004
- [j4]Paul Marchal, Francky Catthoor, Davide Bruni, Luca Benini, José Ignacio Gómez, Luis Piñuel:
Integrated Task Scheduling and Data Assignment for SDRAMs in Dynamic Applications. IEEE Des. Test Comput. 21(5): 378-387 (2004) - [c14]José Ignacio Gómez, Paul Marchal, Sven Verdoolaege, Luis Piñuel, Francky Catthoor:
Optimizing the Memory Bandwidth with Loop Morphing. ASAP 2004: 213-223 - [c13]Christian Tenllado, Carlos García, Manuel Prieto, Luis Piñuel, Francisco Tirado:
Exploiting Multilevel Parallelism Within Modern Microprocessors: DWT as a Case Study. VECPAR 2004: 556-568 - 2003
- [j3]Michael C. Huang, Daniel Chaver, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Customizing the Branch Predictor to Reduce Complexity and Energy Consumption. IEEE Micro 23(5): 12-25 (2003) - [c12]Paul Marchal, José Ignacio Gómez, Luis Piñuel, Davide Bruni, Luca Benini, Francky Catthoor, Henk Corporaal:
SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms. DATE 2003: 10516-10523 - [c11]Carlos García, Roberto Lario, Manuel Prieto, Luis Piñuel, Francisco Tirado:
Vectorization of Multigrid Codes Using SIMD ISA Extensions. IPDPS 2003: 58 - [c10]Daniel Chaver, Christian Tenllado, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Vectorization of the 2D Wavelet Lifting Transform Using SIMD Extensions. IPDPS 2003: 228 - [c9]Daniel Chaver, Luis Piñuel, Manuel Prieto, Francisco Tirado, Michael C. Huang:
Branch prediction on demand: an energy-efficient solution. ISLPED 2003: 390-395 - [p1]Pol Marchal, José Ignacio Gómez, Davide Bruni, Luca Benini, Luis Piñuel, Francky Catthoor, Henk Corporaal:
SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms. Embedded Software for SoC 2003: 319-330 - 2002
- [j2]José Ignacio Gómez, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Analysis of simulation-adapted SPEC 2000 benchmarks. SIGARCH Comput. Archit. News 30(4): 4-10 (2002) - [c8]Daniel Chaver, Christian Tenllado, Luis Piñuel, Manuel Prieto, Francisco Tirado:
-D Wavelet Transform Enhancement on General-Purpose Microprocessors: Memory Hierarchy and SIMD Parallelism Exploitation. HiPC 2002: 9-21 - [c7]Daniel Chaver, Manuel Prieto, Luis Piñuel, Francisco Tirado:
Parallel Wavelet Transform for Large Scale Image Processing. IPDPS 2002 - [c6]Daniel Chaver, Christian Tenllado, Luis Piñuel, Manuel Prieto, Francisco Tirado:
Wavelet Transform for Large Scale Image Processing on Modern Microprocessors. VECPAR 2002: 549-564 - 2001
- [j1]Luis Piñuel, Rafael A. Moreno, Francisco Tirado:
Analysing value substitution and confidence estimation for value prediction. J. Syst. Archit. 47(5): 459-475 (2001) - 2000
- [c5]Rafael A. Moreno, Luis Piñuel, Silvia Del Pino, Francisco Tirado:
Power-Efficient Value Speculation for High-Performance Microprocessors. EUROMICRO 2000: 1292-1299 - [c4]Rafael A. Moreno, Luis Piñuel, Silvia Del Pino, Francisco Tirado:
A Power Perspective of Value Speculation for Superscalar Microprocessors. ICCD 2000: 147-154 - [c3]Silvia Del Pino, Luis Piñuel, Rafael A. Moreno, Francisco Tirado:
Value Prediction as a Cost-Effective Solution to Improve Embedded Processors Performance. VECPAR 2000: 181-196
1990 – 1999
- 1999
- [c2]Luis Piñuel, Rafael A. Moreno, Francisco Tirado:
Implementation of Hybrid Context Based Value Predictors Using Value Sequence Classification. Euro-Par 1999: 1291-1295 - 1998
- [c1]Luis Piñuel, Ignacio Martín Llorente, Francisco Tirado:
A special-purpose parallel computer for solving partial differential equations. PDP 1998: 509-517
Coauthor Index
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