CIT Brains KidSize Robot: RoboCup 2015 KidSize League Winner. - Hayashibara, Yasuo; Minakata, Hideaki; Irie, Kiyoshi; Maekawa, Daiki; Tsukioka, George; Suzuki, Yasufumi; Mashiko, Taiitiro; Ito, Yusuke; Yamamoto, Ryu; Ando, Masayuki; Hirama, Shouta; Suzuki, Yukari; et al. (2015)

Low-power embedded ReRAM technology for IoT applications. - Ueki, Makoto; Takeuchi, K.; Yamamoto, T.; Tanabe, Akira; Ikarashi, N.; Saitoh, M.; Nagumo, T.; Sunamura, Hiroshi; Narihiro, Mitsuru; Uejima, Kazuya; Masuzaki, Koji; Furutake, Naoya; et al. (2015)

A Novel Variable Inductor Using a Bridge Circuit and Its Application to a 5-20 GHz Tunable LC-VCO. - Tanabe, Akira; Hijioka, Ken'ichiro; Nagase, Hirokazu; Hayashi, Yoshihiro (IEEE J. Solid State Circuits, 2011)

A 40 Gb/s Multi-Data-Rate CMOS Transmitter and Receiver Chipset With SFI-5 Interface for Optical Transmission Systems. - Kaeriyama, Shunichi; Amamiya, Yasushi; Noguchi, Hidemi; Yamazaki, Zin; Yamase, Tomoyuki; Hosoya, Ken'ichi; Okamoto, Minoru; Tomari, Shiro; Yamaguchi, Hiroshi; Shoda, Hiroaki; Ikeda, Hironobu; Tanaka, Shinji; et al. (IEEE J. Solid State Circuits, 2009)

A 40Gb/s multi-data-rate CMOS transceiver chipset with SFI-5 interface for optical transmission systems. - Amamiya, Yasushi; Kaeriyama, Shunichi; Noguchi, Hidemi; Yamazaki, Zin; Yamase, Tomoyuki; Hosoya, Ken'ichi; Okamoto, Minoru; Tomari, Shiro; Yamaguchi, Hiroshi; Shoda, Hiroaki; Ikeda, Hironobu; Tanaka, Shinji; et al. (2009)

A Novel Monitoring Method of RF Characteristics Variations for Sub-0.1μm MOSFETs with Precise Gate-resistance Model. - Tanabe, Akira; Hijioka, Ken'ichiro; Hayashi, Yoshihiro (2006)

A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC. - Tanabe, Akira; Nakahara, Yasushi; Furukawa, Akio; Mogami, Tohru (IEEE J. Solid State Circuits, 2003)

0.18- μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation. - Tanabe, Akira; Umetani, Masato; Fujiwara, Ikuo; Ogura, Takayuki; Kataoka, Kotaro; Okihara, Masao; Sakuraba, Hiroshi; Endoh, Tetsuo; Masuoka, Fujio (IEEE J. Solid State Circuits, 2001)

Beyond the red brick wall (panel): challenges and solutions in 50nm physical design. - Onodera, Hidetoshi; Kahng, Andrew B.; Dai, Wayne Wei-Ming; Nassif, Sani R.; Kim, Juho; Tanabe, Akira; Hattori, Toshihiro (2001)

A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier. - Tanabe, Akira; Soda, Masaaki; Nakahara, Yasushi; Tamura, Takao; Yoshida, Kazuyoshi; Furukawa, Akio (IEEE J. Solid State Circuits, 1998)

2.8-Gb/s 176-mW byte-interleaved and 3.0-Gb/s 118-mW bit-interleaved 8: 1 multiplexers with a 0.15-μm CMOS technology. - Kurisu, Masakazu; Kaneko, Makoto; Suzaki, Tetsuyuki; Tanabe, Akira; Togo, Mitsuhiro; Furukawa, Akio; Tamura, Takao; Nakajima, Ken; Yoshida, Kazuyoshi (IEEE J. Solid State Circuits, 1996)

A 30-ns 64-Mb DRAM with built-in self-test and self-repair function. - Tanabe, Akira; Takeshima, Toshio; Koike, Hiroki; Aimoto, Yoshiharu; Takada, Masahide; Ishijima, Toshiyuki; Kasai, Naoki; Hada, Hiromitsu; Shibahara, Kentaro; Kunio, Takemitsu; Tanigawa, Takaho; Saeki, Takanori; et al. (IEEE J. Solid State Circuits, 1992)