A VLSI Architecture with Multiple Fast Store-Based Block Parallel Processing for Output Probability and Likelihood Score Computations in HMM-Based Isolated Word Recognition. - Nakamura, Kazuhiro; Shimazaki, Ryo; Yamamoto, Masatoshi; Takagi, Kazuyoshi; Takagi, Naofumi (IEICE Trans. Electron., 2012)

A VLSI Architecture for Output Probability Computations of HMM-Based Recognition Systems with Store-Based Block Parallel Processing. - Nakamura, Kazuhiro; Yamamoto, Masatoshi; Takagi, Kazuyoshi; Takagi, Naofumi (IEICE Trans. Inf. Syst., 2010)

NBRP databases: databases of biological resources in Japan. - Yamazaki, Yukiko; Akashi, Ryo; Banno, Yutaka; Endo, Takashi; Ezura, Hiroshi; Fukami-Kobayashi, Kaoru; Inaba, Kazuo; Isa, Tadashi; Kamei, Katsuhiko; Kasai, Fumie; Kobayashi, Masatomo; Kurata, Nori; et al. (Nucleic Acids Res., 2010)

Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems. - Nakamura, Kazuhiro; Yamamoto, Masatoshi; Takagi, Kazuyoshi; Takagi, Naofumi (2008)