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ORCIDDavide De Caro
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- affiliation: University of Naples, Naples, Italy
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2020 – today
- 2024
[c34]Luca Tegazzini, Gennaro Di Meo, Davide De Caro, Antonio G. M. Strollo:
Design of a Hardware-Efficient Floating-Point Multiplier with Dynamic Segmentation. PRIME 2024: 1-4- 2023
- [j52]Gennaro Di Meo
, Antonio Giuseppe Maria Strollo, Davide De Caro:
Novel Low-Power Floating-Point Divider With Linear Approximation and Minimum Mean Relative Error. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5275-5288 (2023) - [i2]Cristina Silvano, Daniele Ielmini, Fabrizio Ferrandi, Leandro Fiorin, Serena Curzel, Luca Benini, Francesco Conti, Angelo Garofalo, Cristian Zambelli, Enrico Calore, Sebastiano Fabio Schifano, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Stefania Perri, Nicola Petra, Davide De Caro, Luciano Lavagno, Teodoro Urso, Valeria Cardellini, Gian Carlo Cardarilli, Robert Birke:
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. CoRR abs/2306.15552 (2023) - [i1]Fabrizio Ferrandi, Serena Curzel, Leandro Fiorin, Daniele Ielmini, Cristina Silvano, Francesco Conti, Alessio Burrello, Francesco Barchi, Luca Benini, Luciano Lavagno, Teodoro Urso, Enrico Calore, Sebastiano Fabio Schifano, Cristian Zambelli, Maurizio Palesi, Giuseppe Ascia, Enrico Russo, Nicola Petra, Davide De Caro, Gennaro Di Meo, Valeria Cardellini, Salvatore Filippone, Francesco Lo Presti, Francesco Silvestri, Paolo Palazzari, Stefania Perri:
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. CoRR abs/2311.17815 (2023) - 2022
- [j51]Gennaro Di Meo, Davide De Caro, Giacinto Paolo Saggese, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo:
A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 297-308 (2022) - [j50]Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra, Giacinto Paolo Saggese, Gennaro Di Meo:
Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements. IEEE Trans. Circuits Syst. I Regul. Pap. 69(6): 2449-2462 (2022) - [c33]Gennaro Di Meo, Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
A novel low-power DLMS adaptive filter with sign-magnitude learning and approximated FIR section. PRIME 2022: 217-220 - 2020
- [j49]Ettore Napoli, Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo:
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 121-134 (2020) - [j48]Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra, Gennaro Di Meo:
Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 3021-3034 (2020) - [j47]Davide De Caro, Gennaro Di Meo, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo:
A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization-Free SoC Applications. IEEE Trans. Circuits Syst. 67-I(11): 3839-3852 (2020) - [c32]Gennaro Di Meo, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding. ICECS 2020: 1-4 - [c31]Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. ISCAS 2020: 1 - [c30]Antonio G. M. Strollo, Davide De Caro, Ettore Napoli, Nicola Petra, Gennaro Di Meo:
Low-Power Approximate Multiplier with Error Recovery using a New Approximate 4-2 Compressor. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [j46]Gerardo Castellano, Davide De Caro, Darjn Esposito, Paolo Bifulco, Ettore Napoli, Nicola Petra, Emilio Andreozzi, Mario Cesarelli, Antonio G. M. Strollo:
An FPGA-Oriented Algorithm for Real-Time Filtering of Poisson Noise in Video Streams, with Application to X-Ray Fluoroscopy. Circuits Syst. Signal Process. 38(7): 3269-3294 (2019) - [j45]Darjn Esposito, Davide De Caro, Gennaro Di Meo, Ettore Napoli, Antonio G. M. Strollo:
Low-Power Hardware Implementation of Least-Mean-Square Adaptive Filters Using Approximate Arithmetic. Circuits Syst. Signal Process. 38(12): 5606-5622 (2019) - [c29]Gennaro Di Meo, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
Variable-Rounded LMS Filter for Low-Power Applications. ApplePies 2019: 155-161 - 2018
- [j44]Daniele Montanari, Gerardo Castellano, Ehsan Kargaran, Giacomo Pini, Saheed Tijani, Davide De Caro, Antonio Giuseppe Maria Strollo, Danilo Manstretta, Rinaldo Castello:
An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands. IEEE J. Solid State Circuits 53(7): 1945-1959 (2018) - [j43]Michele De Martino, Davide De Caro, Darjn Esposito, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo:
A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread- Spectrum Capability. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3885-3896 (2018) - [j42]Darjn Esposito, Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra:
Approximate Multipliers Based on New Approximate Compressors. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(12): 4169-4182 (2018) - [c28]Darjn Esposito, Gennaro Di Meo, Davide De Caro, Antonio G. M. Strollo, Ettore Napoli:
Design of Low-Power Approximate LMS Filters with Precision-Scalability. ApplePies 2018: 237-243 - [c27]Darjn Esposito, Gennaro Di Meo, Davide De Caro, Antonio G. M. Strollo, Ettore Napoli:
Quality-Scalable Approximate LMS Filter. ICECS 2018: 849-852 - [c26]Darjn Esposito, Gennaro Di Meo, Davide De Caro, Nicola Petra, Ettore Napoli, Antonio G. M. Strollo:
On the Use of Approximate Multipliers in LMS Adaptive Filters. ISCAS 2018: 1-5 - [c25]Darjn Esposito, Gennaro Di Meo, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
Stall-Aware Fixed-Point Implementation of LMS Filters. PRIME 2018: 169-172 - 2017
- [j41]Davide De Caro, Fabio Tessitore, Gianfranco Vai, Gerardo Castellano, Ettore Napoli, Nicola Petra, Claudio Parrella, Antonio G. M. Strollo:
Single Flip-Flop Driving Circuit for Glitch-Free NAND-Based Digitally Controlled Delay-Lines. Circuits Syst. Signal Process. 36(4): 1341-1360 (2017) - [j40]Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio G. M. Strollo:
A SISO Register Circuit Tailored for Input Data with Low Transition Probability. IEEE Trans. Computers 66(1): 45-51 (2017) - [j39]Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio Giuseppe Maria Strollo:
Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(5): 1040-1050 (2017) - [j38]Davide De Caro, Ettore Napoli, Darjn Esposito, Gerardo Castellano, Nicola Petra, Antonio G. M. Strollo:
Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(5): 1187-1200 (2017) - [j37]Gerardo Castellano, Daniele Montanari, Davide De Caro, Danilo Manstretta, Antonio Giuseppe Maria Strollo:
An Efficient Digital Background Control for Hybrid Transformer-Based Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(12): 3068-3080 (2017) - [c24]Darjn Esposito, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
On the use of approximate adders in carry-save multiplier-accumulators. ISCAS 2017: 1-4 - 2016
- [j36]Darjn Esposito, Davide De Caro, Antonio Giuseppe Maria Strollo:
Variable Latency Speculative Parallel Prefix Adders for Unsigned and Signed Operands. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(8): 1200-1209 (2016) - [c23]Gerardo Castellano, Davide De Caro, Antonio G. M. Strollo, Danilo Manstretta:
A low power control system for real-time tuning of a hybrid transformer-based receiver. ICECS 2016: 328-331 - [c22]Darjn Esposito, Gerardo Castellano, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs. ISCAS 2016: 1970-1973 - 2015
- [j35]Mariangela Genovese, Paolo Bifulco, Davide De Caro, Ettore Napoli, Nicola Petra, Maria Romano, Mario Cesarelli, Antonio G. M. Strollo:
Hardware implementation of a spatio-temporal average filter for real-time denoising of fluoroscopic images. Integr. 49: 114-124 (2015) - [j34]Davide De Caro, Fabio Tessitore, Gianfranco Vai, Nicola Imperato, Nicola Petra, Ettore Napoli, Claudio Parrella, Antonio G. M. Strollo:
A 3.3 GHz Spread-Spectrum Clock Generator Supporting Discontinuous Frequency Modulations in 28 nm CMOS. IEEE J. Solid State Circuits 50(9): 2074-2089 (2015) - [j33]Darjn Esposito, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo:
Variable Latency Speculative Han-Carlson Adder. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1353-1361 (2015) - 2014
- [j32]Mariangela Genovese, Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
Analysis and comparison of Direct Digital Frequency Synthesizers implemented on FPGA. Integr. 47(2): 261-271 (2014) - [j31]Nicola Petra, Davide De Caro, Valeria Garofalo, Ettore Napoli, Antonio G. M. Strollo:
Truncated squarer with minimum mean-square error. Microelectron. J. 45(6): 799-804 (2014) - [j30]Davide De Caro, Mariangela Genovese, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
Accurate Fixed-Point Logarithmic Converter. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 526-530 (2014) - [j29]Alessandro Cilardo, Davide De Caro, Nicola Petra, Francesco Caserta, Nicola Mazzocca, Ettore Napoli, Antonio Giuseppe Maria Strollo:
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(12): 3426-3435 (2014) - [c21]Davide De Caro, Michele De Martino, Nicola Petra, Antonio G. M. Strollo:
Analysis of Spread-Spectrum Clocking Modulations Under Synchronization Timing Constraint. ApplePies 2014: 153-159 - 2013
- [j28]Mariangela Genovese, Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
FPGA Implementation of Gaussian Mixture Model Algorithm for 47 fps Segmentation of 1080p Video. J. Electr. Comput. Eng. 2013: 129589:1-129589:8 (2013) - [j27]Nicola Petra, Sebastiano Russo, Davide De Caro, Ettore Napoli, Giancarlo Barbarino, Antonio G. M. Strollo:
NORA based TDC in 90 nm CMOS. Microelectron. J. 44(6): 489-495 (2013) - [j26]Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo, Fabio Tessitore, Ettore Napoli:
Fixed-Width Multipliers and Multipliers-Accumulators With Min-Max Approximation Error. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(9): 2375-2388 (2013) - [j25]Davide De Caro:
Glitch-Free NAND-Based Digitally Controlled Delay-Lines. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 55-66 (2013) - 2012
- [j24]Tommaso Addabbo, Davide De Caro, Ada Fort, Nicola Petra, Santina Rocchi, Valerio Vignoli:
Efficient implementation of pseudochaotic piecewise linear maps with high digitization accuracies. Int. J. Circuit Theory Appl. 40(1): 1-14 (2012) - [j23]Davide De Caro, Marino Coppola, Nicola Petra:
A high-speed differential resistor ladder. Microelectron. J. 43(6): 433-438 (2012) - [j22]Maurizio Costagliola, Davide De Caro, Antonio Girardi, Roberto Izzi, Niccolò Rinaldi, Marco Spirito, Paolo Spirito:
An Experimental Power-Lines Model for Digital ASICs Based on Transmission Lines. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 162-166 (2012) - 2011
- [j21]Antonio G. M. Strollo, Davide De Caro, Nicola Petra:
Elementary Functions Hardware Implementation Using Constrained Piecewise-Polynomial Approximations. IEEE Trans. Computers 60(3): 418-432 (2011) - [j20]Nicola Petra, Davide De Caro, Valeria Garofalo, Ettore Napoli, Antonio G. M. Strollo:
Design of Fixed-Width Multipliers With Linear Compensation Function. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(5): 947-960 (2011) - [j19]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
Efficient Logarithmic Converters for Digital Signal Processing Applications. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 667-671 (2011) - [j18]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear Approximation. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(10): 2409-2419 (2011) - 2010
- [j17]Davide De Caro, Carlo Alberto Romani, Nicola Petra, Antonio G. M. Strollo, Claudio Parrella:
A 1.27 GHz, All-Digital Spread Spectrum Clock Generator/Synthesizer in 65 nm CMOS. IEEE J. Solid State Circuits 45(5): 1048-1060 (2010) - [j16]Nicola Petra, Davide De Caro, Valeria Garofalo, Ettore Napoli, Antonio G. M. Strollo:
Truncated Binary Multipliers With Variable Correction and Minimum Mean Square Error. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(6): 1312-1325 (2010) - [c20]Davide De Caro, Marino Coppola, Nicola Petra, Ettore Napoli, Antonio G. M. Strollo, Valeria Garofalo:
High-speed differential resistor ladder for A/D converters. ISCAS 2010: 1723-1726 - [c19]Nicola Petra, Davide De Caro, Antonio G. M. Strollo, Valeria Garofalo, Ettore Napoli, Marino Coppola, Pietro Todisco:
Fixed-width CSD multipliers with minimum mean square error. ISCAS 2010: 4149-4152 - [c18]Valeria Garofalo, Marino Coppola, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
A novel truncated squarer with linear compensation function. ISCAS 2010: 4157-4160
2000 – 2009
- 2009
- [j15]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
Digital Synthesizer/Mixer With Hybrid CORDIC-Multiplier Architecture: Error Analysis and Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(2): 364-373 (2009) - [j14]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
High-Performance Special Function Unit for Programmable 3-D Graphics Processors. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(9): 1968-1978 (2009) - 2008
- [j13]Andrea Bonfanti, Davide De Caro, Alfio Dario Grasso, Salvatore Pennisi, Carlo Samori, Antonio G. M. Strollo:
A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-µm CMOS. IEEE J. Solid State Circuits 43(6): 1403-1413 (2008) - [j12]Antonio Giuseppe Maria Strollo, Davide De Caro, Nicola Petra:
A 430 MHz, 280 mW Processor for the Conversion of Cartesian to Polar Coordinates in 0.25 µm CMOS. IEEE J. Solid State Circuits 43(11): 2503-2513 (2008) - [j11]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(7): 2116-2127 (2008) - [c17]Valeria Garofalo, Nicola Petra, Davide De Caro, Antonio G. M. Strollo, Ettore Napoli:
Low error truncated multipliers for DSP applications. ICECS 2008: 29-32 - [c16]Antonio G. M. Strollo, Davide De Caro, Nicola Petra, Ettore Napoli, Valeria Garofalo:
Constrained piecewise polinomial approximation for hardware implementation of elementary functions. ICECS 2008: 698-701 - [c15]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
A high performance floating-point special function unit using constrained piecewise quadratic approximation. ISCAS 2008: 472-475 - 2007
- [j10]Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo:
A 380 MHz Direct Digital Synthesizer/Mixer With Hybrid CORDIC Architecture in 0.25 µm CMOS. IEEE J. Solid State Circuits 42(1): 151-160 (2007) - [j9]Antonio Giuseppe Maria Strollo, Davide De Caro, Nicola Petra:
A 630 MHz, 76 mW Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique. IEEE J. Solid State Circuits 42(2): 350-360 (2007) - [j8]Nicola Petra, Davide De Caro, Antonio G. M. Strollo:
A Novel Architecture for Galois Fields GF(2^m) Multipliers Based on Mastrovito Scheme. IEEE Trans. Computers 56(11): 1470-1483 (2007) - [c14]Nicola Petra, Davide De Caro, Antonio G. M. Strollo:
Design of fixed-width multipliers with minimum mean square error. ECCTD 2007: 464-467 - [c13]Nicola Petra, Davide De Caro, Antonio G. M. Strollo:
High Speed Galois Fields GF(2m) Multipliers. ECCTD 2007: 468-471 - 2006
- [c12]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
A 630MHz direct digital frequency synthesizer with 90dBc SFDR in 0.25µm CMOS. ISSCC 2006: 972-981 - [c11]Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
A 380MHz, 150mW direct digital synthesizer/mixer in 0.25µm CMOS. ISSCC 2006: 982-991 - 2005
- [j7]Davide De Caro, Antonio Giuseppe Maria Strollo:
High-performance direct digital frequency synthesizers in 0.25 μm CMOS using dual-slope approximation. IEEE J. Solid State Circuits 40(11): 2220-2227 (2005) - [j6]Davide De Caro, Antonio G. M. Strollo:
High-performance direct digital frequency synthesizers using piecewise-polynomial approximation. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(2): 324-337 (2005) - [j5]Antonio G. M. Strollo, Nicola Petra, Davide De Caro:
Dual-Tree Error Compensation for High Performance Fixed-Width Multipliers. IEEE Trans. Circuits Syst. II Express Briefs 52-II(8): 501-507 (2005) - [j4]Antonio G. M. Strollo, Davide De Caro, Ettore Napoli, Nicola Petra:
A novel high-speed sense-amplifier-based flip-flop. IEEE Trans. Very Large Scale Integr. Syst. 13(11): 1266-1274 (2005) - [c10]Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo:
A high-speed sense-amplifier based flip-flop. ECCTD 2005: 99-102 - 2004
- [j3]Davide De Caro, Ettore Napoli, Antonio G. M. Strollo:
Direct digital frequency synthesizers with polynomial hyperfolding technique. IEEE Trans. Circuits Syst. II Express Briefs 51-II(7): 337-344 (2004) - [c9]Antonio G. M. Strollo, Davide De Caro, Ettore Napoli, Nicola Petra:
High-speed direct digital frequency synthesizers in 0.25-μm CMOS. CICC 2004: 163-166 - [c8]Antonio Giuseppe Maria Strollo, Nicola Petra, Davide De Caro, Ettore Napoli:
An area-efficient high-speed Reed-Solomon decoder in 0.25 μm CMOS. ESSCIRC 2004: 479-482 - 2003
- [j2]Antonio G. M. Strollo, Davide De Caro:
Direct digital frequency synthesizers exploiting piecewise linear Chebyshev approximation. Microelectron. J. 34(11): 1099-1106 (2003) - [j1]Antonio G. M. Strollo, Davide De Caro:
Booth folding encoding for high performance squarer circuits. IEEE Trans. Circuits Syst. II Express Briefs 50(5): 250-254 (2003) - [c7]Antonio Giuseppe Maria Strollo, Davide De Caro, Ettore Napoli, Nicola Petra:
Direct digital frequency synthesis with dual-slope approach. ESSCIRC 2003: 397-400 - 2002
- [b1]Davide De Caro:
Architetture innovative per la sintesi digitale diretta di frequenza. University of Naples Federico II, Italy, 2002 - [c6]Davide De Caro, Ettore Napoli, Antonio G. M. Strollo:
ROM-less direct digital frequency synthesizers exploiting polynomial approximation. ICECS 2002: 481-484 - [c5]Giacinto Paolo Saggese, Antonio G. M. Strollo, Nicola Mazzocca, Davide De Caro:
Shuffled serial adder: an area-latency effective serial adder. ICECS 2002: 607-610 - 2001
- [c4]Antonio G. M. Strollo, Ettore Napoli, Davide De Caro:
New design of squarer circuits using Booth encoding and folding techniques. ICECS 2001: 193-196 - [c3]Antonio G. M. Strollo, Ettore Napoli, Davide De Caro, Giacinto Paolo Saggese:
A reconfigurable 2D convolver for real-time SAR imaging. ICECS 2001: 741-744 - [c2]Davide De Caro, Nicola Mazzocca, Ettore Napoli, Giacinto Paolo Saggese, Antonio G. M. Strollo:
Test pattern generator for hybrid testing of combinational circuits. ICECS 2001: 745-748 - 2000
- [c1]Antonio G. M. Strollo, Ettore Napoli, Davide De Caro:
New clock-gating techniques for low-power flip-flops. ISLPED 2000: 114-119
Coauthor Index
[i2] [i1] [j51] [j50] [c33] [j49] [j48] [j47] [c32] [c31] [c30] [j46] [c29] [j43] [j42] [c26] [c25] [j41] [j40] [j39] [j38] [c24] [c22] [j35] [j34] [j33] [j32] [j31] [j30] [j29] [c21] [j28] [j27] [j26] [j24] [j23] [j21] [j20] [j19] [j18] [j17] [j16] [c20] [c19] [c18] [j15] [j14] [j12] [j11] [c17] [c16] [c15] [j10] [j9] [j8] [c14] [c13] [c12] [c11] [j5] [j4] [c10] [c9] [c8] [c7]
Antonio G. M. Strollo
aka: Antonio Giuseppe Maria Strollo
aka: Antonio Giuseppe Maria Strollo
[c34] [j52] [j51] [j50] [c33] [j49] [j48] [j47] [c32] [c31] [c30] [j46] [j45] [c29] [j44] [j43] [j42] [c28] [c27] [c26] [c25] [j41] [j40] [j39] [j38] [j37] [c24] [j36] [c23] [c22] [j35] [j34] [j33] [j32] [j31] [j30] [j29] [c21] [j28] [j27] [j26] [j21] [j20] [j19] [j18] [j17] [j16] [c20] [c19] [c18] [j15] [j14] [j13] [j12] [j11] [c17] [c16] [c15] [j10] [j9] [j8] [c14] [c13] [c12] [c11] [j7] [j6] [j5] [j4] [c10] [j3] [c9] [c8] [j2] [j1] [c7] [c6] [c5] [c4] [c3] [c2] [c1]
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