A Cellular Multiband DTC-Based Digital Polar Transmitter With -153-dBc/Hz Noise in 14-nm FinFET - Paolo Madoglio; Yorgos Palaskas; Jörn Angel; Jakob M. Tomasik; Sven Hampel; Petra Schubert; Peter Preyler; Thomas Mayer; Thomas Bauernfeind; Peter Plechinger; Ashoke Ravi; Ofir Degani; et al. (IEEE J. Solid State Circuits, 2020)

Transformer-Combining Digital PA with Efficiency Peaking at 0, -6, and -12 dB Backoff in 32nm CMOS - Parmoon Seddighrad; Yorgos Palaskas; Hongtao Xu; Paolo Madoglio; Kailash Chandrashekar; David J. Allstot (IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, 2020)

A Cellular Multiband DTC-Based Digital Polar Transmitter With -153 dBc/Hz Noise in 14-nm FinFET - Yorgos Palaskas; Peter Plechinger; Ashoke Ravi; Ofir Degani; Rotem Banin; Eshel Gordon; Zdravko Boos; Paolo Madoglio; Jörn Angel; Jakob M. Tomasik; Sven Hampel; Petra Schubert; et al. (45th IEEE European Solid State Circuits Conference, ESSCIRC 2019, Cracow, Poland, September 23-26, 2019, 2019)

13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications - Paolo Madoglio; Hongtao Xu; Kailash Chandrashekar; Luis Cuellar; Muhammad Faisal; Yee William Li; Hyung Seok Kim; Khoa Minh Nguyen; Yulin Tan; Brent R. Carlton; Vaibhav A. Vaidya; Yanjie Wang; et al. (2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017, 2017)

Wi-Fi RF energy harvesting for battery-free wearable radio platforms - Vamsi Talla; Stefano Pellerano; Hongtao Xu; Ashoke Ravi; Yorgos Palaskas (2015 IEEE International Conference on RFID, RFID 2015, San Diego, CA, USA, April 15-17, 2015, 2015)

F1: Advanced RF transceiver design techniques - Albert C. Jerng; Yorgos Palaskas; Eric A. M. Klumperink; Didier Belot; Songcheol Hong; Brian A. Floyd (2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013, 2013)

A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement - Wei Tai; Hongtao Xu; Ashoke Ravi; Hasnain Lakdawala; Ofir B. Degani; L. Richard Carley; Yorgos Palaskas (IEEE J. Solid State Circuits, 2012)

A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS - Ashoke Ravi; Paolo Madoglio; Hongtao Xu; Kailash Chandrashekar; Marian Verhelst; Stefano Pellerano; Luis Cuellar; Mariano Aguirre-Hernandez; Masoud Sajadieh; J. E. Zarate-Roldan; Ofir Bochobza-Degani; Hasnain Lakdawala; et al. (IEEE J. Solid State Circuits, 2012)

A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS - Paolo Madoglio; Ashoke Ravi; Hongtao Xu; Kailash Chandrashekar; Marian Verhelst; Stefano Pellerano; Luis Cuellar; Mariano Aguirre; Masoud Sajadieh; Ofir B. Degani; Hasnain Lakdawala; Yorgos Palaskas (2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, USA, February 19-23, 2012, 2012)

Session 15 overview: Mm-Wave and THz techniques: RF subcommittee - Ehsan Afshari; Yorgos Palaskas (2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, USA, February 19-23, 2012, 2012)

A 32nm CMOS all-digital reconfigurable fractional frequency divider for LO generation in multistandard SoC radios with on-the-fly interference management - Kailash Chandrashekar; Stefano Pellerano; Paolo Madoglio; Ashoke Ravi; Yorgos Palaskas (2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, USA, February 19-23, 2012, 2012)

A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS - Yulin Tan; Jon Duster; Chang-Tsung Fu; Erkan Alpman; Ajay Balankutty; Chun C. Lee; Ashoke Ravi; Stefano Pellerano; Kailash Chandrashekar; Hyung Seok Kim; Brent R. Carlton; Satoshi Suzuki; et al. (Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012, 2012)

A Flip-Chip-Packaged 25.3 dBm Class-D Outphasing Power Amplifier in 32 nm CMOS for WLAN Application - Hongtao Xu; Yorgos Palaskas; Ashoke Ravi; Masoud Sajadieh; Mohammed A. El-Tanani; Krishnamurthy Soumyanath (IEEE J. Solid State Circuits, 2011)

Introduction to the Special Issue on the 2011 IEEE International Solid-State Circuits Conference - Jafar Savoj; Yiannos Manoli; Hooman Darabi; Yorgos Palaskas; Michael Moyal (IEEE J. Solid State Circuits, 2011)

A 12-element 60GHz CMOS phased array transmitter on LTCC package with integrated antennas - Ajay Balankutty; Stefano Pellerano; Telesphor Kamgaing; Kranti Tantwai; Yorgos Palaskas (IEEE Asian Solid-State Circuits Conference, A-SSCC 2011, Jeju, South Korea, November 14-16, 2011, 2011)

A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control - Wei Tai; Hongtao Xu; Ashoke Ravi; Hasnain Lakdawala; Ofir B. Degani; L. Richard Carley; Yorgos Palaskas (Proceedings of the 37th European Solid-State Circuits Conference, ESSCIRC 2011, Helsinki, Finland, Sept. 12-16, 2011, 2011)

A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, \(Δ\)\(Σ\) Modulator Based on Standard Cell Design With Time-Interleaving - Paolo Madoglio; Ashoke Ravi; Luis Cuellar; Stefano Pellerano; Parmoon Seddighrad; Ismael Lomeli; Yorgos Palaskas (IEEE J. Solid State Circuits, 2010)

A mm-Wave Power-Harvesting RFID Tag in 90 nm CMOS - Stefano Pellerano; Javier Alvarado Jr.; Yorgos Palaskas (IEEE J. Solid State Circuits, 2010)

A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN application - Hongtao Xu; Yorgos Palaskas; Ashoke Ravi; Krishnamurthy Soumyanath (36th European Solid-State Circuits Conference, ESSCIRC 2010, Sevilla, Spain, September 13-17, 2010, 2010)

A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS - Jeffrey S. Walling; Hasnain Lakdawala; Yorgos Palaskas; Ashoke Ravi; Ofir Degani; Krishnamurthy Soumyanath; David J. Allstot (IEEE J. Solid State Circuits, 2009)

A 4.75-GHz Fractional Frequency Divider-by-1.25 With TDC-Based All-Digital Spur Calibration in 45-nm CMOS - Stefano Pellerano; Paolo Madoglio; Yorgos Palaskas (IEEE J. Solid State Circuits, 2009)

A mm-wave power harvesting RFID tag in 90nm CMOS - Stefano Pellerano; Javier Alvarado Jr.; Yorgos Palaskas (IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings, 2009)

A 2.5GHz, 6.9mW \(Δ\)\(Σ\) modulator with standard cell design in 45nm-LP CMOS using time-interleaving - Paolo Madoglio; Ashoke Ravi; Luis Cuellar; Stefano Pellerano; Parmoon Seddighrad; Ismael Lomeli; Yorgos Palaskas (35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009, 2009)

A 4.75GHz fractional frequency divider with digital spur calibration in 45nm CMOS - Stefano Pellerano; Paolo Madoglio; Yorgos Palaskas (IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009, 2009)

A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS - Stefano Pellerano; Yorgos Palaskas; Krishnamurthy Soumyanath (IEEE J. Solid State Circuits, 2008)

MIMO techniques for high data rate radio communications - Yorgos Palaskas; Ashoke Ravi; Stefano Pellerano (Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008, 2008)

A 39.1-to-41.6GHz \(Δ\)\(Σ\) Fractional-N Frequency Synthesizer in 90nm CMOS - Stefano Pellerano; Rajarshi Mukhopadhyay; Ashoke Ravi; Joy Laskar; Yorgos Palaskas (2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008, 2008)

A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation - Jeffrey S. Walling; Hasnain Lakdawala; Yorgos Palaskas; Ashoke Ravi; Ofir Degani; Krishnamurthy Soumyanath; David J. Allstot (2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008, 2008)

A 4-GS/s 4-bit Flash ADC in 0.18-\(μ\)m CMOS - Sunghyun Park; Yorgos Palaskas; Michael P. Flynn (IEEE J. Solid State Circuits, 2007)

A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS - Stefano Pellerano; Yorgos Palaskas; Krishnamurthy Soumyanath (33rd European Solid-State Circuits Conference, ESSCIRC 2007, Munich, Germany, 11-13 September 2007, 2007)

A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process - Yorgos Palaskas; Stewart S. Taylor; Stefano Pellerano; Ian A. Rippke; Ralph E. Bishop; Ashoke Ravi; Hasnain Lakdawala; Krishnamurthy Soumyanath (IEEE J. Solid State Circuits, 2006)

A 5-GHz 108-Mb/s 2 \times2 MIMO Transceiver RFIC With Fully Integrated 20.5-dBm {\rm P}_{\rm 1dB} Power Amplifiers in 90-nm CMOS - Yorgos Palaskas; Ashoke Ravi; Stefano Pellerano; Brent R. Carlton; Mostafa A. Elmala; Ralph E. Bishop; Gaurab Banerjee; Rich B. Nicholls; Stanley K. Ling; Nati Dinur; Stewart S. Taylor; Krishnamurthy Soumyanath (IEEE J. Solid State Circuits, 2006)

A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS - Sunghyun Park; Yorgos Palaskas; Ashoke Ravi; Ralph E. Bishop; Michael P. Flynn (Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006, DoubleTree Hotel, San Jose, California, USA, September 10-13, 2006, 2006)

A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS - Yorgos Palaskas; Ashoke Ravi; Stefano Pellerano; Brent R. Carlton; Mostafa A. Elmala; Ralph E. Bishop; Gaurab Banerjee; Rich B. Nicholls; Stanley K. Ling; Stewart S. Taylor; Krishnamurthy Soumyanath (2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, 2006)

A 4GS/s 4b Flash ADC in 0.18\(μ\)m CMOS - Sunghyun Park; Yorgos Palaskas; Michael P. Flynn (2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, 2006)

A 90-nm MOS-only 3-11GHz transmitter for UWB - Yorgos Palaskas; Ralph E. Bishop; Ashoke Ravi; Krishnamurthy Soumyanath (Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005, 2005)

A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction - Yorgos Palaskas; Stewart S. Taylor; Stefano Pellerano; Ian A. Rippke; Ralph E. Bishop; Ashoke Ravi; Hasnain Lakdawala; Krishnamurthy Soumyanath (Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005, 2005)

A "divide and conquer" technique for implementing wide dynamic range continuous-time filters - Yorgos Palaskas; Yannis P. Tsividis; Vladimir I. Prodanov; Vito Boccuzzi (IEEE J. Solid State Circuits, 2004)

Dynamic range optimization of weakly nonlinear, fully balanced, Gm-C filters with power dissipation constraints - Yorgos Palaskas; Yannis P. Tsividis (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A power efficient channel selection filter/coarse AGC with no range switching transients - Yorgos Palaskas; Yannis P. Tsividis; Vito Boccuzzi (Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003, 2003)

Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear active filters - Yorgos Palaskas; Yannis P. Tsividis (Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, 2003)

Design considerations and experimental evaluation of a syllabic companding audio frequency filter - George Palaskas; Yannis P. Tsividis (Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, 2002)

A "divide and conquer" technique for the design of wide dynamic range continuous time filters - George Palaskas; Yannis P. Tsividis (Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, 2001)

"Noninvasive" techniques for syllabic companding in signal processors - László Tóth; George Palaskas; Yannis P. Tsividis (Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, 2001)