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BibTeX records: Yu-Chi Tsao
@article{DBLP:journals/tcas/TsaoC12, author = {Yu{-}Chi Tsao and Ken Choi}, title = {Area-Efficient {VLSI} Implementation for Parallel Linear-Phase {FIR} Digital Filters of Odd Length Based on Fast {FIR} Algorithm}, journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs}, volume = {59-II}, number = {6}, pages = {371--375}, year = {2012}, url = {https://doi.org/10.1109/TCSII.2012.2195062}, doi = {10.1109/TCSII.2012.2195062}, timestamp = {Wed, 27 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcas/TsaoC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/TsaoC12, author = {Yu{-}Chi Tsao and Ken Choi}, title = {Area-Efficient Parallel {FIR} Digital Filter Structures for Symmetric Convolutions Based on Fast {FIR} Algorithm}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {20}, number = {2}, pages = {366--371}, year = {2012}, url = {https://doi.org/10.1109/TVLSI.2010.2095892}, doi = {10.1109/TVLSI.2010.2095892}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/TsaoC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/TsaoC12, author = {Yu{-}Chi Tsao and Ken Choi}, title = {Hardware-efficient {VLSI} implementation for 3-parallel linear-phase {FIR} digital filter of odd length}, booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 2012, Seoul, Korea (South), May 20-23, 2012}, pages = {998--1001}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/ISCAS.2012.6272215}, doi = {10.1109/ISCAS.2012.6272215}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/TsaoC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/TsaoC11, author = {Yu{-}Chi Tsao and Ken Choi}, title = {Hardware-efficient parallel {FIR} digital filter structures for symmetric convolutions}, booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May 15-19 2011, Rio de Janeiro, Brazil}, pages = {2301--2304}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/ISCAS.2011.5938062}, doi = {10.1109/ISCAS.2011.5938062}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/TsaoC11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/ChenLTL08, author = {Yuan Chen and Yu{-}Wei Lin and Yu{-}Chi Tsao and Chen{-}Yi Lee}, title = {A 2.4-Gsample/s {DVFS} {FFT} Processor for {MIMO} {OFDM} Communication Systems}, journal = {{IEEE} J. Solid State Circuits}, volume = {43}, number = {5}, pages = {1260--1273}, year = {2008}, url = {https://doi.org/10.1109/JSSC.2008.920320}, doi = {10.1109/JSSC.2008.920320}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/ChenLTL08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcas/ChenTLLL08, author = {Yuan Chen and Yu{-}Chi Tsao and Yu{-}Wei Lin and Chin{-}Hung Lin and Chen{-}Yi Lee}, title = {An Indexed-Scaling Pipelined {FFT} Processor for OFDM-Based {WPAN} Applications}, journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs}, volume = {55-II}, number = {2}, pages = {146--150}, year = {2008}, url = {https://doi.org/10.1109/TCSII.2007.910771}, doi = {10.1109/TCSII.2007.910771}, timestamp = {Wed, 27 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcas/ChenTLLL08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

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