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BibTeX records: Massimo Rossini
@inproceedings{DBLP:conf/isscc/TanakaHVGKPYPEG16, author = {Tomoharu Tanaka and Mark Helm and Tommaso Vali and Ramin Ghodsi and Koichi Kawai and Jae{-}Kwan Park and Shigekazu Yamada and Feng Pan and Yuichi Einaga and Ali Ghalam and Toru Tanzawa and Jason Guo and Takaaki Ichikawa and Erwin Yu and Satoru Tamada and Tetsuji Manabe and Jiro Kishimoto and Yoko Oikawa and Yasuhiro Takashima and Hidehiko Kuge and Midori Morooka and Ali Mohammadzadeh and Jong Kang and Jeff Tsai and Emanuele Sirizotti and Eric Lee and Luyen Vu and Yuxing Liu and Hoon Choi and Kwonsu Cheon and Daesik Song and Daniel Shin and Jung Hee Yun and Michele Piccardi and Kim{-}Fung Chan and Yogesh Luthra and Dheeraj Srinivasan and Srinivasarao Deshmukh and Kalyan Kavalipurapu and Dan Nguyen and Girolamo Gallo and Sumant Ramprasad and Michelle Luo and Qiang Tang and Michele Incarnati and Agostino Macerola and Luigi Pilolli and Luca De Santis and Massimo Rossini and Violante Moschiano and Giovanni Santin and Bernardino Tronca and Hyunseok Lee and Vipul Patel and Ted Pekny and Aaron Yip and Naveen Prabhu and Purval Sule and Trupti Bemalkhedkar and Kiranmayee Upadhyayula and Camila Jaramillo}, title = {7.7 {A} 768Gb 3b/cell 3D-floating-gate {NAND} flash memory}, booktitle = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2016, San Francisco, CA, USA, January 31 - February 4, 2016}, pages = {142--144}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ISSCC.2016.7417947}, doi = {10.1109/ISSCC.2016.7417947}, timestamp = {Tue, 16 Apr 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/TanakaHVGKPYPEG16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/NasoBCCCCDSCFGGILMMMOPPPPRRRSSSSTMGFVHG13, author = {Giovanni Naso and L. Botticchio and M. Castelli and C. Cerafogli and M. Cichocki and P. Conenna and Andrea D'Alessandro and Luca De Santis and Domenico Di Cicco and W. Di Francesco and M. L. Gallese and Girolamo Gallo and Michele Incarnati and C. Lattaro and Agostino Macerola and G. G. Marotta and Violante Moschiano and D. Orlandi and F. Paolini and S. Perugini and Luigi Pilolli and P. Pistilli and G. Rizzo and F. Rori and Massimo Rossini and Giovanni Santin and Emanuele Sirizotti and A. Smaniotto and U. Siciliani and Marco Tiburzi and R. Meyer and A. Goda and B. Filipiak and Tommaso Vali and Mark Helm and Ramin Ghodsi}, title = {A 128Gb 3b/cell {NAND} flash design using 20nm planar-cell technology}, booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February 17-21, 2013}, pages = {218--219}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ISSCC.2013.6487707}, doi = {10.1109/ISSCC.2013.6487707}, timestamp = {Wed, 08 Dec 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isscc/NasoBCCCCDSCFGGILMMMOPPPPRRRSSSSTMGFVHG13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/MarottaMDTCLMRSPINSBSPGITCPMFGHCORRVGR10, author = {G. G. Marotta and Agostino Macerola and Andrea D'Alessandro and A. Torsi and C. Cerafogli and C. Lattaro and C. Musilli and D. Rivers and Emanuele Sirizotti and F. Paolini and G. Imondi and G. Naso and Giovanni Santin and L. Botticchio and Luca De Santis and Luigi Pilolli and M. L. Gallese and Michele Incarnati and Marco Tiburzi and P. Conenna and S. Perugini and Violante Moschiano and W. Di Francesco and Matt Goldman and Chris Haid and Domenico Di Cicco and D. Orlandi and F. Rori and Massimo Rossini and Tommaso Vali and Ramin Ghodsi and Frank Roohparvar}, title = {A 3bit/cell 32Gb {NAND} flash memory at 34nm with 6MB/s program throughput and with dynamic 2b/cell blocks configuration mode for a program throughput increase up to 13MB/s}, booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010}, pages = {444--445}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ISSCC.2010.5433949}, doi = {10.1109/ISSCC.2010.5433949}, timestamp = {Thu, 19 Oct 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/MarottaMDTCLMRSPINSBSPGITCPMFGHCORRVGR10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mr/IrreraPPRV09, author = {Fernanda Irrera and Ivan Piccoli and Giuseppina Puzzilli and Massimo Rossini and Tommaso Vali}, title = {Reliability improvements in 50 nm {MLC} {NAND} flash memory using short voltage programming pulses}, journal = {Microelectron. Reliab.}, volume = {49}, number = {2}, pages = {135--138}, year = {2009}, url = {https://doi.org/10.1016/j.microrel.2008.11.006}, doi = {10.1016/J.MICROREL.2008.11.006}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mr/IrreraPPRV09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

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