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ORCIDOmid Azizi
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2010 – 2019
- 2014
[c8]Heiner Litz, David R. Cheriton, Amin Firoozshahian, Omid Azizi, John P. Stevenson:
SI-TM: reducing transactional memory abort rates through snapshot isolation. ASPLOS 2014: 383-398- 2013
- [c7]Neal Clayton Crago, Omid Azizi, Steven S. Lumetta, Sanjay J. Patel:
Hybrid latency tolerance for robust energy-efficiency on 1000-core data parallel processors. HPCA 2013: 294-305 - 2012
- [c6]David R. Cheriton, Amin Firoozshahian, Alex Solomatnikov, John P. Stevenson, Omid Azizi:
HICAMP: architectural support for efficient concurrency-safe shared structured data access. ASPLOS 2012: 287-300 - [r1]Omid Azizi, Benjamin C. Lee:
Processor Optimization for Energy Efficiency. Handbook of Energy-Aware and Green Computing 2012: 407-426 - 2011
- [j3]Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz:
Understanding sources of ineffciency in general-purpose chips. Commun. ACM 54(10): 85-93 (2011) - 2010
- [j2]Ofer Shacham, Omid Azizi, Megan Wachs, Stephen Richardson, Mark Horowitz:
Rethinking Digital Design: Why Design Must Change. IEEE Micro 30(6): 9-24 (2010) - [c5]Omid Azizi, Aqeel Mahesri, John P. Stevenson, Sanjay J. Patel, Mark Horowitz:
An integrated framework for joint design space exploration of microarchitecture and circuits. DATE 2010: 250-255 - [c4]Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay J. Patel, Mark Horowitz:
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis. ISCA 2010: 26-36 - [c3]Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz:
Understanding sources of inefficiency in general-purpose chips. ISCA 2010: 37-47
2000 – 2009
- 2009
- [j1]Omid Azizi, Aqeel Mahesri, Sanjay J. Patel, Mark Horowitz:
Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design. SIGARCH Comput. Archit. News 37(2): 56-65 (2009) - 2008
- [c2]Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz:
Processor Performance Modeling using Symbolic Simulation. ISPASS 2008: 127-138 - 2007
- [c1]Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman:
Robust Energy-Efficient Adder Topologies. IEEE Symposium on Computer Arithmetic 2007: 16-28
Coauthor Index
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