default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDLoïc Lagadec
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j19]Charbel Geryes Aoun
, Noura Mansour, Fadi Dornaika, Loïc Lagadec:
Environmental Constraints for Intelligent Internet of Deep-Sea/Underwater Things Relying on Enterprise Architecture Approach. Sensors 24(8): 2433 (2024)- 2023
- [j18]Nabil Kadjouh, Ahcène Bounceur, Madani Bezoui, Mohamed Essaid Khanouche, Reinhardt Euler, Mohammad Hammoudeh, Loïc Lagadec, Sohail Jabbar, Fadi M. Al-Turjman:
A Dominating Tree Based Leader Election Algorithm for Smart Cities IoT Infrastructure. Mob. Networks Appl. 28(2): 718-731 (2023) - [c54]Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier:
TrustSoC: Light and Efficient Heterogeneous SoC Architecture, Secure-by-design. AsianHOST 2023: 1-6 - [c53]Quentin Ducasse, Pascal Cotret, Loïc Lagadec:
JIT Compiler Security through Low-Cost RISC-V Extension. IPDPS Workshops 2023: 125-128 - [c52]Erwan Fabiani, Loïc Lagadec, Alexandre Skrzyniarz, Chiara Relevat, Erell Cottour, Paul Allaire:
Toward a CAD Tool for SYCL programming. IWOCL 2023: 27:1-27:2 - [c51]Matthias Pasquier, Ciprian Teodorov, Frédéric Jouault, Matthias Brun, Loïc Lagadec:
Debugging Paxos in the UML Multiverse. MoDELS (Companion) 2023: 811-820 - [c50]Raphaële Milan, Loïc Lagadec, Théotime Bollengier, Lilian Bossuet, Ciprian Teodorov:
Secured-by-design systems-on-chip: a MBSE Approach. RSP 2023: 07:1-07:7 - [c49]Matthias Pasquier, Ciprian Teodorov, Frédéric Jouault, Matthias Brun, Luka Le Roux, Loïc Lagadec:
Temporal Breakpoints for Multiverse Debugging. SLE 2023: 125-137 - [c48]Quentin Ducasse, Pascal Cotret, Loïc Lagadec:
Gigue: A JIT Code Binary Generator for Hardware Testing. VMIL@SPLASH 2023: 73-82 - [e4]Loïc Lagadec, Vincent Aranega:
Proceedings of the International Workshop on Smalltalk Technologies 2022 co-located with the 28th European Smalltalk User Group Conference (ESUG 2022), Novi Sad, Serbia, August 24th-26th, 2022. CEUR Workshop Proceedings 3325, CEUR-WS.org 2023 [contents] - 2022
- [j17]Ahcène Bounceur, Madani Bezoui, Mohammad Hammoudeh, Loïc Lagadec, Reinhardt Euler:
Finding the polygon hull of a network without conditions on the starting vertex. Trans. Emerg. Telecommun. Technol. 33(3) (2022) - [c47]Emilien Fournier, Ciprian Teodorov, Loïc Lagadec:
Dolmen: FPGA Swarm for Safety and Liveness Verification. DATE 2022: 1425-1430 - [c46]Matthias Pasquier, Ciprian Teodorov, Frédéric Jouault, Matthias Brun, Luka Le Roux, Loïc Lagadec:
Practical multiverse debugging through user-defined reductions: application to UML models. MoDELS 2022: 87-97 - [c45]Quentin Ducasse, Guillermo Polito, Pablo Tesone, Pascal Cotret, Loïc Lagadec:
Porting a JIT Compiler to RISC-V: Challenges and Opportunities. MPLR 2022: 112-118 - 2021
- [c44]Emilien Fournier, Ciprian Teodorov, Loïc Lagadec:
Carnac: Algorithm Variability for Fast Swarm Verification on FPGA. FPL 2021: 185-189 - [c43]Théotime Bollengier, Loïc Lagadec, Ciprian Teodorov:
Prototyping FPGA through overlays. RSP 2021: 15-21 - [i2]Quentin Ducasse, Pascal Cotret, Loïc Lagadec, Robert Stewart:
Benchmarking Quantized Neural Networks on FPGAs with FINN. CoRR abs/2102.01341 (2021) - 2020
- [j16]Cyrielle Feron, Loïc Lagadec, Vianney Lapôtre:
Automated exploration of homomorphic encryption scheme input parameters. J. Inf. Secur. Appl. 55: 102627 (2020) - [j15]Loïc Lagadec, Anne Etien, Jannik Laval:
Advances in Smalltalk technologies. Sci. Comput. Program. 199: 102518 (2020) - [c42]Emilien Fournier, Ciprian Teodorov, Loïc Lagadec:
Menhir: Generic High-Speed FPGA Model-Checker. DSD 2020: 65-72
2010 – 2019
- 2019
- [c41]Paul Gardner-Stephen, Angus Wallace, Lucas Moss, Loïc Lagadec, Matthew Lloyd:
Designing a combined personal communicator and data entry terminal for disaster relief & remote operations. GHTC 2019: 1-8 - [c40]Nabil Kadjouh, Ahcène Bounceur, Abdelkamel Tari, Reinhardt Euler, Loïc Lagadec, Abdelkader Laouid:
Temperature-based models of batteries for the simulation of Wireless Sensor Networks. ICFNDS 2019: 22:1-22:6 - [c39]Nabil Kadjouh, Ahcène Bounceur, Abdelkamel Tari, Loïc Lagadec, Reinhardt Euler, Madani Bezoui:
A New Leader Election Algorithm based on the WBS Algorithm Dedicated to Smart-cities. ICFNDS 2019: 23:1-23:5 - 2018
- [c38]Ahcène Bounceur, Olivier Marc, Massinissa Lounis, Julien Soler, Laurent Clavier, Pierre Combeau, Rodolphe Vauzelle, Loïc Lagadec, Reinhardt Euler, Madani Bezoui, Pietro Manzoni:
CupCarbon-Lab: An IoT emulator. CCNC 2018: 1-2 - [c37]Madani Bezoui, Ahcène Bounceur, Loïc Lagadec, Reinhardt Euler, Mohammad Hammoudeh, Abdelkader Laouid, Abdelkamel Tari:
Detecting gaps and voids in WSNs and IoT networks: the angle-based method. ICFNDS 2018: 36:1-36:7 - [c36]Ahcène Bounceur, Madani Bezoui, Loïc Lagadec, Reinhardt Euler, Abdelkader Laouid, Mahamadou Traore, Mounir Lallali:
Detecting gaps and voids in WSNs and IoT networks: the minimum x-coordinate based method. ICFNDS 2018: 37:1-37:7 - [c35]Ahcène Bounceur, Madani Bezoui, Loïc Lagadec, Reinhardt Euler, Abdelkader Laouid, Mohammad Hammoudeh:
DoTRo: A New Dominating Tree Routing Algorithm for Efficient and Fault-Tolerant Leader Election in WSNs and IoT Networks. MSPN 2018: 42-53 - [c34]Cyrielle Feron, Vianney Lapotre, Loïc Lagadec:
Fast Evaluation of Homomorphic Encryption Schemes Based on Ring-LWE. NTMS 2018: 1-5 - [c33]Jean-Christophe Le Lann, Théotime Bollengier, Mohamad Najem, Loïc Lagadec:
An Integrated Toolchain for Overlay-centric System-on-chip. ReCoSoC 2018: 1-8 - 2017
- [j14]Mohamad Najem, Théotime Bollengier, Jean-Christophe Le Lann, Loïc Lagadec:
Extended overlay architectures for heterogeneous FPGA cluster management. J. Syst. Archit. 78: 1-14 (2017) - [j13]Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec:
A Unified Design Flow to Automatically Generate On-Chip Monitors During High-Level Synthesis of Hardware Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(3): 384-397 (2017) - [c32]Théotime Bollengier, Loïc Lagadec, Mohamad Najem, Jean-Christophe Le Lann, Pierre Guilloux:
Soft Timing Closure for Soft Programmable Logic Cores: The ARGen Approach. ARC 2017: 93-105 - [c31]Erwan Fabiani, Loïc Lagadec, Mohamed Ben Hammouda, Ciprian Teodorov:
Asserting causal properties in High Level Synthesis. IVSW 2017: 111-116 - [c30]Cyrielle Feron, Vianney Lapotre, Loïc Lagadec:
PAnTHErS: A Prototyping and Analysis Tool for Homomorphic Encryption Schemes. SECRYPT 2017: 359-366 - 2016
- [j12]Youenn Corre, Jean-Philippe Diguet, Dominique Heller, Dominique Blouin, Loïc Lagadec:
TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA. ACM Trans. Embed. Comput. Syst. 15(1): 9:1-9:27 (2016) - [c29]Théotime Bollengier, Mohamad Najem, Jean-Christophe Le Lann, Loïc Lagadec:
Demo: Overlay architectures for heterogeneous FPGA cluster management. DASIP 2016: 239-240 - 2015
- [c28]Le Xuan Sang, Loïc Lagadec, Luc Fabresse, Jannik Laval, Noury Bouraqadi:
A Meta Model Supporting Both Hardware and Smalltalk-Based Execution of Fpga Circuits. IWST 2015: 6:1-6:14 - [c27]Jean-Philippe Schneider, Joël Champeau, Ciprian Teodorov, Eric Senn, Loïc Lagadec:
A role language to interpret multi-formalism System of systems models. SysCon 2015: 200-205 - [c26]Jean-Philippe Schneider, Joël Champeau, Loïc Lagadec, Eric Senn:
Role Framework to Support Collaborative Virtual Prototyping of System of Systems. WETICE 2015: 144-149 - 2014
- [j11]Loïc Lagadec, Alain Plantec:
Preface to the special issue on advances in Smalltalk based systems. Sci. Comput. Program. 96: 1-3 (2014) - [j10]Loïc Lagadec, Ciprian Teodorov, Jean-Christophe Le Lann, Damien Picard, Erwan Fabiani:
Model-driven toolset for embedded reconfigurable cores: Flexible prototyping and software-like debugging. Sci. Comput. Program. 96: 156-174 (2014) - [j9]Alain Plantec, Loïc Lagadec:
International workshop on smalltalk technologies 2011 special issue. Softw. Pract. Exp. 44(4): 391-392 (2014) - [j8]Ciprian Teodorov, Loïc Lagadec:
Model-driven physical-design automation for FPGAs: fast prototyping and legacy reuse. Softw. Pract. Exp. 44(4): 455-482 (2014) - [c25]Jean-Philippe Schneider, Eric Senn, Joël Champeau, Loïc Lagadec:
Flexible Model-Based Simulation as a System's Design Driver. CSDM (Posters) 2014: 25-35 - [c24]Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec:
A design approach to automatically generate on-chip monitors during high-level synthesis of hardware accelerator. ACM Great Lakes Symposium on VLSI 2014: 273-278 - [c23]Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec:
A design approach to automatically synthesize ANSI-C assertions during High-Level Synthesis of hardware accelerators. ISCAS 2014: 165-168 - [c22]Ciprian Teodorov, Loïc Lagadec:
Virtual prototyping of R2D NASIC based FPGA. NANOARCH 2014: 179-180 - [c21]Loïc Lagadec, Jean-Christophe Le Lann, Théotime Bollengier:
A prototyping platform for virtual reconfigurable units. ReCoSoC 2014: 1-7 - 2013
- [j7]Loïc Lagadec, Sébastien Pillement, Arnaud Tisserand:
Introduction. Tech. Sci. Informatiques 32(2): 149-151 (2013) - [c20]Youenn Corre, Jean-Philippe Diguet, Loïc Lagadec, Dominique Heller, Dominique Blouin:
Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA. ARC 2013: 154-166 - [c19]Papa Issa Diallo, Joël Champeau, Loïc Lagadec:
A Model-Driven Approach to Enhance Tool Interoperability Using the Theory of Models of Computation. SLE 2013: 218-237 - 2012
- [c18]Youenn Corre, Van-Trinh Hoang, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec:
HLS-based fast design space exploration of ad hoc hardware accelerators: A key tool for MPSoC synthesis on FPGA. DASIP 2012: 1-8 - [c17]Youenn Corre, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec:
A framework for high-level synthesis of heterogeneous MP-SoC. ACM Great Lakes Symposium on VLSI 2012: 283-286 - [e3]Loïc Lagadec, Alain Plantec:
Proceedings of the International Workshop on Smalltalk Technologies, IWST 2012, Gent, Belgium, August 28, 2012. ACM 2012, ISBN 978-1-4503-1897-6 [contents] - [i1]Yahia Benmoussa, Jalil Boukhobza, Yassine Hadjadj Aoul, Loïc Lagadec, Djamel Benazzouz:
Behavioral Systel Level Power Consumption Modeling of Mobile Video Streaming applications. CoRR abs/1208.6389 (2012) - 2011
- [j6]Michael Hübner, Jürgen Becker, Loïc Lagadec, Gilles Sassatelli:
Selected Papers from the International Workshop on Reconfigurable Communication-Centric Systems on Chips (ReCoSoC' 2010). Int. J. Reconfigurable Comput. 2011: 865402:1 (2011) - [j5]Loïc Lagadec, Damien Picard, Youenn Corre, Pierre-Yves Lucas:
Experiment Centric Teaching for Reconfigurable Processors. Int. J. Reconfigurable Comput. 2011: 952560:1-952560:14 (2011) - [c16]Ciprian Teodorov, Loïc Lagadec:
MDE-based FPGA physical design: fast model-driven prototyping with Smalltalk. IWST 2011: 7:1-7:13 - [c15]Ciprian Teodorov, Pritish Narayanan, Loïc Lagadec, Catherine Dezan:
Regular 2D NASIC-based architecture and design space exploration. NANOARCH 2011: 70-77 - [c14]Damien Picard, Loïc Lagadec:
Fast prototyping environment for embedded reconfigurable units. ReCoSoC 2011: 1-8 - [c13]Ciprian Teodorov, Loïc Lagadec:
FPGA SDK for nanoscale architectures. ReCoSoC 2011: 1-8 - [c12]Ciprian Teodorov, Damien Picard, Loïc Lagadec:
FPGA physical-design automation using Model-Driven Engineering. ReCoSoC 2011: 1-6 - [e2]Loïc Lagadec, Alain Plantec:
Proceedings of the International Workshop on Smalltalk Technologies, IWST 2011, Edinburgh, United Kingdom, August 23, 2011. ACM 2011, ISBN 978-1-4503-1050-5 [contents] - 2010
- [c11]Loïc Lagadec, Damien Picard:
Smalltalk debug lives in the matrix. IWST 2010: 11-16 - [c10]Loïc Lagadec, Damien Picard, Pierre-Yves Lucas:
Session Teaching Reconfigurable Processor: the Biniou Approach. ReCoSoC 2010: 127-134 - [c9]Ludovic Barrandon, Thierry Capitaine, Loïc Lagadec, Nathalie Julien, Christophe Moy, Thierry Monédière:
Virtual SoPC rad-hardening for satellite applications. ReCoSoC 2010: 179-180 - [e1]Michael Hübner, Loïc Lagadec, Oliver Sander, Jürgen Becker:
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, ReCoSoC 2010, Karlsruhe, Germany, May 17-19, 2010. KIT Scientific Reports 7551, KIT Scientific Publishing 2010, ISBN 978-3-86644-515-4 [contents]
2000 – 2009
- 2009
- [j4]Damien Picard, Loïc Lagadec:
Multilevel Simulation of Heterogeneous Reconfigurable Platforms. Int. J. Reconfigurable Comput. 2009: 162416:1-162416:12 (2009) - [j3]Catherine Dezan, Ciprian Teodorov, Loïc Lagadec, Michael Leuchtenburg, Teng Wang, Pritish Narayanan, Csaba Andras Moritz:
Towards a framework for designing applications onto hybrid nano/CMOS fabrics. Microelectron. J. 40(4-5): 656-664 (2009) - [j2]Loïc Lagadec, Bernard Pottier, Damien Picard:
Toolset for nano-reconfigurable computing. Microelectron. J. 40(4-5): 665-672 (2009) - [c8]Loïc Lagadec, Damien Picard:
Software-like debugging methodology for reconfigurable platforms. IPDPS 2009: 1-4 - 2006
- [j1]Catherine Dezan, Erwan Fabiani, Christophe Gouyen, Loïc Lagadec, Bernard Pottier, Caaliph Andriamisaina, Alix Poungou:
Synthèse portable pour micro-architectures à grain fin. Application aux turbo décodeurs et nanofabriques. Tech. Sci. Informatiques 25(7): 893-920 (2006) - [c7]Catherine Dezan, Christophe Jégo, Bernard Pottier, Christophe Gouyen, Loïc Lagadec:
The Case Study of Block Turbo Decoders on a Framework for Portable Synthesis on FPGA. HICSS 2006 - 2005
- [c6]Christophe Gouyen, Loïc Lagadec, Bernard Pottier, A. André, E. Lepicier, François Dupont:
Compiler level integration of a portable CAD framework for reconfigurable circuits. ReCoSoC 2005: 19-26 - 2004
- [c5]Joel Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani:
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators. SAMOS 2004: 293-302 - 2002
- [c4]Loïc Lagadec, Bernard Pottier, Oscar Villellas, Erwan Fabiani, Catherine Dezan:
A LUT based Approach for High Level Synthesis on FPGAs. IWLS 2002: 167-172 - 2001
- [c3]Loïc Lagadec, Dominique Lavenier, Erwan Fabiani, Bernard Pottier:
Placing, Routing, and Editing Virtual FPGAs. FPL 2001: 357-366
1990 – 1999
- 1999
- [c2]Catherine Dezan, Loïc Lagadec, Bernard Pottier:
Object Oriented Approach for Modeling Digital Circuits. MSE 1999: 51-52 - 1998
- [c1]Loïc Lagadec, Bernard Pottier:
A 6200 Model and Editor Based on Object Technology. FPL 1998: 515-519
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-12 23:00 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
