Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX. - Cordova, David; Cops, Wim; Deval, Yann; Rivet, Francois; Lapuyade, Hervé; Nodenot, Nicolas; Piccin, Yohan (2021)

Design methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers. - Cordova, David; Cops, Wim; Deval, Yann; Rivet, Francois; Lapuyade, Hervé; Nodenot, Nicolas; Piccin, Yohan (2021)

Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22 nm FDSOI. - Cordova, David; Cops, Wim; Deval, Yann; Rivet, François; Lapuyade, Hervé; Nodenot, Nicolas; Piccin, Yohan (2020)

A 0.8V 875 MS/s 7b low-power SAR ADC for ADC-Based Wireline Receivers in 22nm FDSOI. - Cordova, David; Cops, Wim; Deval, Yann; Rivet, Francois; Lapuyade, Hervé; Nodenot, Nicolas; Piccin, Yohan (2020)

A Hierarchical Track and Hold Circuit for High Speed ADC-Based Receivers in 22nm FDSOI. - Cordova, David; Cops, Wim; Deval, Yann; Rivet, Francois; Lapuyade, Hervé; Nodenot, Nicolas; Piccin, Yohan (2019)