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ORCIDZizheng Guo
- > Home > Persons > Zizheng Guo
Publications
- 2025
[c31]Boyang Zhang
, Che Chang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yang Sui, Chih-Chun Chang, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, Tsung-Wei Huang:
iTAP: An Incremental Task Graph Partitioner for Task-parallel Static Timing Analysis. ASP-DAC 2025: 407-415- [c30]Che Chang, Boyang Zhang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, Tsung-Wei Huang:
PathGen: An Efficient Parallel Critical Path Generation Algorithm. ASP-DAC 2025: 416-424 - [c28]Xizhe Shi, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang:
Handling Latch Loops in Timing Analysis with Improved Complexity and Divergent Loop Detection. DATE 2025: 1-7 - [i11]Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin:
A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis. CoRR abs/2503.12512 (2025) - [i9]Chunyuan Zhao, Zizheng Guo, Zuodong Zhang, Yibo Lin:
GAP-LA: GPU-Accelerated Performance-Driven Layer Assignment. CoRR abs/2507.13375 (2025) - 2024
- [j20]Yufei Chen, Zizheng Guo, Runsheng Wang, Ru Huang, Yibo Lin, Cheng Zhuo:
Dynamic Supply Noise Aware Timing Analysis With JIT Machine Learning Integration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1511-1524 (2024) - [c26]Yufan Du, Zizheng Guo, Xun Jiang, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang:
PowPrediCT: Cross-Stage Power Prediction with Circuit-Transformation-Aware Learning. DAC 2024: 36:1-36:6 - [c25]Zizheng Guo, Tsung-Wei Huang, Zhou Jin, Cheng Zhuo, Yibo Lin, Runsheng Wang, Ru Huang:
Heterogeneous Static Timing Analysis with Advanced Delay Calculator. DATE 2024: 1-6 - [c23]Cheng-Hsiang Chiu, Zhicheng Xiong, Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
An Efficient Task-Parallel Pipeline Programming Framework. HPC Asia 2024: 95-106 - [c22]Yufan Du, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang:
Fusion of Global Placement and Gate Sizing with Differentiable Optimization. ICCAD 2024: 19:1-19:9 - [c21]Zizheng Guo, Zuodong Zhang, Wuxi Li, Tsung-Wei Huang, Xizhe Shi, Yufan Du, Yibo Lin, Runsheng Wang, Ru Huang:
HeteroExcept: A CPU-GPU Heterogeneous Algorithm to Accelerate Exception-aware Static Timing Analysis. ICCAD 2024: 65:1-65:9 - [c20]Chunyuan Zhao, Zizheng Guo, Rui Wang, Zaiwen Wen, Yun Liang, Yibo Lin:
HeLEM-GR: Heterogeneous Global Routing with Linearized Exponential Multiplier Method. ICCAD 2024: 147:1-147:9 - 2023
- [j13]Peiyu Liao, Dawei Guo, Zizheng Guo, Siting Liu, Yibo Lin, Bei Yu:
DREAMPlace 4.0: Timing-Driven Placement With Momentum-Based Net Weighting and Lagrangian-Based Refinement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3374-3387 (2023) - [j12]Zuodong Zhang, Zizheng Guo, Yibo Lin, Meng Li, Runsheng Wang, Ru Huang:
AVATAR: An Aging- and Variation-Aware Dynamic Timing Analyzer for Error-Efficient Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4139-4151 (2023) - [j11]Guannan Guo, Tsung-Wei Huang, Yibo Lin, Zizheng Guo, Sushma Yellapragada, Martin D. F. Wong:
A GPU-Accelerated Framework for Path-Based Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4219-4232 (2023) - [j10]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
Accelerating Static Timing Analysis Using CPU-GPU Heterogeneous Parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4973-4984 (2023) - [c18]Zizheng Guo, Zuodong Zhang, Xun Jiang, Wuxi Li, Yibo Lin, Runsheng Wang, Ru Huang:
General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism. DAC 2023: 1-6 - [c17]Xun Jiang, Zizheng Guo, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang:
Invited Paper: Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms. ICCAD 2023: 1-9 - 2022
- [j6]Zizheng Guo, Mingwei Yang, Tsung-Wei Huang, Yibo Lin:
A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3466-3478 (2022) - [c16]Kexing Zhou, Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
Efficient Critical Paths Search Algorithm using Mergeable Heap. ASP-DAC 2022: 190-195 - [c15]Zuodong Zhang, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang:
AVATAR: an aging- and variation-aware dynamic timing analyzer for application-based DVAFS. DAC 2022: 841-846 - [c14]Zizheng Guo, Mingjie Liu, Jiaqi Gu, Shuhan Zhang, David Z. Pan, Yibo Lin:
A timing engine inspired graph neural network model for pre-routing slack prediction. DAC 2022: 1207-1212 - [c13]Zizheng Guo, Yibo Lin:
Differentiable-timing-driven global placement. DAC 2022: 1315-1320 - [c12]Zuodong Zhang, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang:
EventTimer: Fast and Accurate Event-Based Dynamic Timing Analysis. DATE 2022: 945-950 - [c10]Zizheng Guo, Feng Gu, Yibo Lin:
GPU-Accelerated Rectilinear Steiner Tree Generation. ICCAD 2022: 53:1-53:9 - [c8]Zixuan Jiang, Mingjie Liu, Zizheng Guo, Shuhan Zhang, Yibo Lin, David Z. Pan:
A Tale of EDA's Long Tail: Long-Tailed Distribution Learning for Electronic Design Automation. MLCAD 2022: 135-141 - [i2]Cheng-Hsiang Chiu, Tsung-Wei Huang, Zizheng Guo, Yibo Lin:
Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++. CoRR abs/2202.00717 (2022) - 2021
- [c7]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. DAC 2021: 715-720 - [c6]Zizheng Guo, Jing Mai, Yibo Lin:
Ultrafast CPU/GPU Kernels for Density Accumulation in Placement. DAC 2021: 1123-1128 - [c3]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
HeteroCPPR: Accelerating Common Path Pessimism Removal with Heterogeneous CPU-GPU Parallelism. ICCAD 2021: 1-9 - 2020
- [c2]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
GPU-Accelerated Static Timing Analysis. ICCAD 2020: 147:1-147:9
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