BibTeX records: Hongshuai Zhang

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@article{DBLP:journals/tcasI/SongYLLZHZLZYMY25,
  author       = {Jingrun Song and
                  Xinyu Yang and
                  Jiaxu Liu and
                  Yueduo Liu and
                  Zihao Zhu and
                  Zhengxuan Han and
                  Zehao Zhang and
                  Jiaxin Liu and
                  Hongshuai Zhang and
                  Jun Yin and
                  Pui{-}In Mak and
                  Shiheng Yang},
  title        = {Analyses Concerning the Phase Noise and Nonlinear Behavior of the
                  Charge-Sharing Integrator-Based Hybrid {PLL}},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {72},
  number       = {7},
  pages        = {3149--3162},
  year         = {2025},
  url          = {https://doi.org/10.1109/TCSI.2024.3508838},
  doi          = {10.1109/TCSI.2024.3508838},
  timestamp    = {Mon, 14 Jul 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcasI/SongYLLZHZLZYMY25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/LiuZYBZZLWZYYMY25,
  author       = {Yueduo Liu and
                  Zihao Zhu and
                  Xinyu Yang and
                  Rongxin Bao and
                  Zehao Zhang and
                  Hongshuai Zhang and
                  Jiaxin Liu and
                  Zheng Wang and
                  Mingkang Zhang and
                  Na Yan and
                  Jun Yin and
                  Pui{-}In Mak and
                  Shiheng Yang},
  title        = {A 0.4{\(\mu\)}W/MHz Reference-Replication-Based {RC} Oscillator with
                  Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/{\textdegree}C
                  from -40 to 125{\textdegree}C},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2025,
                  San Francisco, CA, USA, February 16-20, 2025},
  pages        = {84--86},
  publisher    = {{IEEE}},
  year         = {2025},
  url          = {https://doi.org/10.1109/ISSCC49661.2025.10904801},
  doi          = {10.1109/ISSCC49661.2025.10904801},
  timestamp    = {Sun, 27 Apr 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/LiuZYBZZLWZYYMY25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jcise/FengHTJZZ23,
  author       = {Zhengyuan Feng and
                  Xiaoliang Hu and
                  Zengguo Tian and
                  Baozhu Jiang and
                  Hongshuai Zhang and
                  Wanli Zhang},
  title        = {Bi-LSTM-Based Dynamic Prediction Model for Pulling Speed of Czochralski
                  Single-Crystal Furnace},
  journal      = {J. Comput. Inf. Sci. Eng.},
  volume       = {23},
  number       = {4},
  year         = {2023},
  url          = {https://doi.org/10.1115/1.4056138},
  doi          = {10.1115/1.4056138},
  timestamp    = {Tue, 15 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcise/FengHTJZZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/ZhangZMC23,
  author       = {Hongshuai Zhang and
                  Yan Zhu and
                  Rui Paulo Martins and
                  Chi{-}Hang Chan},
  title        = {A Second-Order {NS} Pipelined {SAR} {ADC} With Quantization-Prediction-Unrolled
                  Gain Error Shaping and Fully Passive Integrator},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {58},
  number       = {12},
  pages        = {3565--3575},
  year         = {2023},
  url          = {https://doi.org/10.1109/JSSC.2023.3307189},
  doi          = {10.1109/JSSC.2023.3307189},
  timestamp    = {Sun, 10 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/ZhangZMC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/ZhangZCM23,
  author       = {Hongshuai Zhang and
                  Yan Zhu and
                  Chi{-}Hang Chan and
                  Rui Paulo Martins},
  title        = {A 25MHz-BW 77.2dB-SNDR 2\({}^{\mbox{nd}}\)-Order Gain-Error-Shaping
                  and {NS} Pipelined {SAR} {ADC} Based on a Quantization-Prediction-Unrolled
                  Scheme},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
                  San Francisco, CA, USA, February 19-23, 2023},
  pages        = {174--175},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ISSCC42615.2023.10067438},
  doi          = {10.1109/ISSCC42615.2023.10067438},
  timestamp    = {Wed, 29 Mar 2023 15:53:39 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ZhangZCM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/ZhangZCM22,
  author       = {Hongshuai Zhang and
                  Yan Zhu and
                  Chi{-}Hang Chan and
                  Rui Paulo Martins},
  title        = {An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline
                  {ADC} With Code-Counter-Based Offset Calibration},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {57},
  number       = {5},
  pages        = {1480--1491},
  year         = {2022},
  url          = {https://doi.org/10.1109/JSSC.2021.3111912},
  doi          = {10.1109/JSSC.2021.3111912},
  timestamp    = {Wed, 18 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ZhangZCM22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/access/CaoTJZCZ21,
  author       = {Fang Cao and
                  Zengguo Tian and
                  Baozhu Jiang and
                  Hongshuai Zhang and
                  Heng Chen and
                  Xuguang Zhu},
  title        = {3D Model Registration-Based Batch Wafer-ID Recognition Algorithm},
  journal      = {{IEEE} Access},
  volume       = {9},
  pages        = {150283--150291},
  year         = {2021},
  url          = {https://doi.org/10.1109/ACCESS.2021.3125735},
  doi          = {10.1109/ACCESS.2021.3125735},
  timestamp    = {Wed, 15 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/access/CaoTJZCZ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/ZhangZCM21,
  author       = {Hongshuai Zhang and
                  Yan Zhu and
                  Chi{-}Hang Chan and
                  Rui Paulo Martins},
  title        = {27.6 {A} 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping
                  SAR-Assisted Pipeline {ADC} with Background Offset Calibration},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
                  San Francisco, CA, USA, February 13-22, 2021},
  pages        = {380--382},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISSCC42613.2021.9365833},
  doi          = {10.1109/ISSCC42613.2021.9365833},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ZhangZCM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/ZhangZSZ19,
  author       = {Hongshuai Zhang and
                  Hong Zhang and
                  Yan Song and
                  Ruizhi Zhang},
  title        = {A 10-Bit 200-kS/s 1.76- {\textdollar}{\textbackslash}mu{\textdollar}
                  {W} {SAR} {ADC} With Hybrid {CAP-MOS} {DAC} for Energy-Limited Applications},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {66-I},
  number       = {5},
  pages        = {1716--1727},
  year         = {2019},
  url          = {https://doi.org/10.1109/TCSI.2019.2899162},
  doi          = {10.1109/TCSI.2019.2899162},
  timestamp    = {Mon, 23 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcas/ZhangZSZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/ZhangLZZLZCC18,
  author       = {Hong Zhang and
                  Xipeng Liu and
                  Jie Zhang and
                  Hongshuai Zhang and
                  Jijun Li and
                  Ruizhi Zhang and
                  Shuai Chen and
                  Anthony Chan Carusone},
  title        = {A Nano-Watt MOS-Only Voltage Reference With High-Slope {PTAT} Voltage
                  Generators},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {65-II},
  number       = {1},
  pages        = {1--5},
  year         = {2018},
  url          = {https://doi.org/10.1109/TCSII.2017.2654441},
  doi          = {10.1109/TCSII.2017.2654441},
  timestamp    = {Mon, 23 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcas/ZhangLZZLZCC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/ZhangZSLLZ18,
  author       = {Hongshuai Zhang and
                  Hong Zhang and
                  Quan Sun and
                  Jijun Li and
                  Xipeng Liu and
                  Ruizhi Zhang},
  title        = {A 0.6-V 10-bit 200-kS/s {SAR} {ADC} With Higher Side-Reset-and-Set
                  Switching Scheme and Hybrid {CAP-MOS} {DAC}},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {65-I},
  number       = {11},
  pages        = {3639--3650},
  year         = {2018},
  url          = {https://doi.org/10.1109/TCSI.2018.2853043},
  doi          = {10.1109/TCSI.2018.2853043},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcas/ZhangZSLLZ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/Zhang0SZ18,
  author       = {Hongshuai Zhang and
                  Hong Zhang and
                  Yan Song and
                  Ruizhi Zhang},
  title        = {A 10-bit 200-kS/s 1.76-{\(\mu\)}W {SAR} {ADC} with Hybrid {CAP-MOS}
                  {DAC} for Energy-Limited Applications},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
                  27-30 May 2018, Florence, Italy},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISCAS.2018.8351169},
  doi          = {10.1109/ISCAS.2018.8351169},
  timestamp    = {Mon, 23 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/Zhang0SZ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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