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2020 – today
- 2024
[i5]Xiaoyu Gan, Xizi Chen, Jingyang Zhu, Xiaomeng Wang, Jingbo Jiang, Chi-Ying Tsui:
Partial Knowledge Distillation for Alleviating the Inherent Inter-Class Discrepancy in Federated Learning. CoRR abs/2411.15403 (2024)- 2023
- [j2]Xizi Chen
, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 644-657 (2023) - [c9]Xizi Chen, Rui Pan, Xiaomeng Wang, Fengshi Tian, Chi-Ying Tsui:
Late Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification. DAC 2023: 1-2 - [c8]Xizi Chen, Shin Kawai, Triet Nguyen-Van:
Model Predictive Control for Stand-alone Half-bridge Inverter. GCCE 2023: 1183-1187 - [c7]Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
Accelerating Large Kernel Convolutions with Nested Winograd Transformation. VLSI-SoC 2023: 1-6 - [c6]Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
Accelerating Large Kernel Convolutions with Nested Winograd Transformation. VLSI-SoC (Selected Papers) 2023: 109-125 - [i4]Xiaomeng Wang, Fengshi Tian, Xizi Chen, Jiakun Zheng, Xuejiao Liu, Fengbin Tu, Jie Yang, Mohamad Sawan, Kwang-Ting Cheng, Chi-Ying Tsui:
A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications. CoRR abs/2307.05944 (2023) - 2022
- [c5]Xiaomeng Wang, Xuejiao Liu, Xianghong Hu, Xiaopeng Zhong, Xizi Chen, Yu Liu, Patrick Kong, Fengshi Tian, Chi-Ying Tsui:
TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network. AICAS 2022: 66-69 - 2021
- [i3]Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
A Reconfigurable Winograd CNN Accelerator with Nesting Decomposition Algorithm for Computing Convolution with Large Filters. CoRR abs/2102.13272 (2021) - [i2]Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation. CoRR abs/2104.01303 (2021) - 2020
- [c4]Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
Tight Compression: Compressing CNN Model Tightly Through Unstructured Pruning and Simulated Annealing Based Permutation. DAC 2020: 1-6
2010 – 2019
- 2019
- [j1]Xizi Chen, Jingbo Jiang, Jingyang Zhu, Chi-Ying Tsui:
SubMac: Exploiting the subword-based computation in RRAM-based CNN accelerator for energy saving and speedup. Integr. 69: 356-368 (2019) - [c3]Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
CompRRAE: RRAM-based convolutional neural network accelerator with reduced computations through a runtime activation estimation. ASP-DAC 2019: 133-139 - 2018
- [c2]Xizi Chen, Jingbo Jiang, Jingyang Zhu, Chi-Ying Tsui:
A high-throughput and energy-efficient RRAM-based convolutional neural network using data encoding and dynamic quantization. ASP-DAC 2018: 123-128 - [c1]Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
SparseNN: An energy-efficient neural network accelerator exploiting input and output sparsity. DATE 2018: 241-244 - 2017
- [i1]Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
SparseNN: An Energy-Efficient Neural Network Accelerator Exploiting Input and Output Sparsity. CoRR abs/1711.01263 (2017)
Coauthor Index
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