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ORCIDAlberto Parravicini
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2020 – today
- 2022
[b1]Alberto Parravicini:
The case for reconfigurable architectures in high-performance graph and sparse information retrieval. Polytechnic University of Milan, Italy, 2022- [c14]Francesco Sgherzi
, Alberto Parravicini, Marco D. Santambrogio:
A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems. ISCAS 2022: 1259-1263 - [i6]Francesco Sgherzi, Alberto Parravicini, Marco Domenico Santambrogio:
A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems. CoRR abs/2201.07498 (2022) - 2021
- [c13]Alberto Parravicini, Francesco Sgherzi, Marco D. Santambrogio:
A reduced-precision streaming SpMV architecture for Personalized PageRank on FPGA. ASP-DAC 2021: 378-383 - [c12]Edoardo Ramalli, Alberto Parravicini, Guido Walter Di Donato, Mirko Salaris, Céline Hudelot, Marco D. Santambrogio:
Demystifying Drug Repurposing Domain Comprehension with Knowledge Graph Embedding. BioCAS 2021: 1-5 - [c11]Alberto Parravicini, Luca Giuseppe Cellamare, Marco Siracusa, Marco D. Santambrogio:
Scaling up HBM Efficiency of Top-K SpMV for Approximate Embedding Similarity on FPGAs. DAC 2021: 799-804 - [c10]Francesco Sgherzi, Alberto Parravicini, Marco Siracusa, Marco D. Santambrogio:
Solving Large Top-K Graph Eigenproblems with a Memory and Compute-optimized FPGA Design. FCCM 2021: 78-87 - [c9]Alberto Parravicini, René Müller:
The Cost of Speculation: Revisiting Overheads in the V8 JavaScript Engine. IISWC 2021: 13-23 - [c8]Alberto Parravicini, Arnaud Delamare, Marco Arnaboldi, Marco D. Santambrogio:
DAG-based Scheduling with Resource Sharing for Multi-task Applications in a Polyglot GPU Runtime. IPDPS 2021: 111-120 - [c7]Guido Walter Di Donato, Andrea Damiani, Alberto Parravicini, Enea Bionda, Francesca Soldan, Carlo Tornelli, Marco D. Santambrogio:
Towards Graph Machine Learning for Smart Grid Knowledge Graphs in Industrial Scenarios. RTSI 2021: 97-102 - [c6]Nicolas Racchi, Alberto Parravicini, Guido Walter Di Donato, Marco D. Santambrogio:
Fraud Prevention and Detection on Heterogeneous Information Networks with Deep Graph Infomax. RTSI 2021: 153-158 - [i5]Alberto Parravicini, Luca Giuseppe Cellamare, Marco Siracusa, Marco Domenico Santambrogio:
Scaling up HBM Efficiency of Top-K SpMV for Approximate Embedding Similarity on FPGAs. CoRR abs/2103.04808 (2021) - [i4]Francesco Sgherzi, Alberto Parravicini, Marco Siracusa, Marco Domenico Santambrogio:
Solving Large Top-K Graph Eigenproblems with a Memory and Compute-optimized FPGA Design. CoRR abs/2103.10040 (2021) - [i3]Edoardo Ramalli, Alberto Parravicini, Guido Walter Di Donato, Mirko Salaris, Céline Hudelot, Marco Domenico Santambrogio:
Demystifying Drug Repurposing Domain Comprehension with Knowledge Graph Embedding. CoRR abs/2108.13051 (2021) - 2020
- [i2]Alberto Parravicini, Francesco Sgherzi, Marco D. Santambrogio:
A reduced-precision streaming SpMV architecture for Personalized PageRank on FPGA. CoRR abs/2009.10443 (2020) - [i1]Alberto Parravicini, Arnaud Delamare, Marco Arnaboldi, Marco D. Santambrogio:
DAG-based Scheduling with Resource Sharing for Multi-task Applications in a Polyglot GPU Runtime. CoRR abs/2012.09646 (2020)
2010 – 2019
- 2019
- [c5]Alberto Parravicini, Rhicheek Patra, Davide B. Bartolini, Marco D. Santambrogio:
Fast and Accurate Entity Linking via Graph Embedding. GRADES/NDA@SIGMOD/PODS 2019: 10:1-10:9 - [c4]Diego Piccinotti, Edoardo Ramalli, Alberto Parravicini, Rolando Brondolin, Marco D. Santambrogio:
Solving write conflicts in GPU-accelerated graph computation: A PageRank case-study. RTSI 2019: 144-148 - [c3]Luca G. Cellamare, Michele A. Bertoldi, Alberto Parravicini, Marco D. Santambrogio:
Exploring transductive and inductive methods for vertex embedding in biological networks. RTSI 2019: 285-290 - 2018
- [c2]Luca Stornaiuolo, Alberto Parravicini, Donatella Sciuto, Marco D. Santambrogio:
FIDA: A Framework to Automatically Integrate FPGA Kernels Within Data-Science Applications. IPDPS Workshops 2018: 198-201 - 2017
- [c1]Luca Stornaiuolo, Alberto Parravicini, Gianluca Durelli, Marco D. Santambrogio:
Exploiting FPGAs from Higher Level Languages A Signal Analysis Case Study. IPDPS Workshops 2017: 132-140
Coauthor Index
aka: Marco Domenico Santambrogio
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