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Mingche Lai
- > Home > Persons > Mingche Lai
Publications
- 2025
- [j27]Cewen Liu
, Xingyun Qi, Fangxu Lv, Qiang Wang, Liquan Xiao, Xiaoyue Hu, Chaolong Xu, Zhouhao Yang, Meng Li, Mingche Lai:
A high speed adaptive reflection cancellation equalization circuit with Floating Tap FFE and Loop-Refactored DFE for ADC-DSP-based wireline receiver. Microelectron. J. 159: 106612 (2025) - [j26]Mingche Lai
, Chaolong Xu
, Fangxu Lv
, Jiaqing Xu
, Qiang Wang
, Yang Ou
, Xiaoyue Hu, Cewen Liu, Zhouhao Yang
:
An Adaptive 56-Gb/s Duo-PAM4 Detector Using Reduced Branch Maximum Likelihood Sequence Detection in a 28-nm CMOS Wireline Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. 72(4): 1866-1877 (2025) - 2024
- [j24]Xiaoyue Hu, Fangxu Lv, Mingche Lai, Zhang Luo, Qiang Wang, Chaolong Xu, Ruotian Yin, Zhouhao Yang, Cewen Liu:
A high speed and low BER dual-mode adaptive equalizer using hybrid parallel DFE. IEICE Electron. Express 21(19): 20240417 (2024) - [c38]Chaolong Xu, Fangxu Lv, Mingche Lai, Zhang Luo, Xingyun Qi, Jiaqing Xu, Qiang Wang, Liquan Xiao, Cewen Liu, Hua Xu:
A reduced complexity MLSD-based adaptive Duo-PAM4 detector in 28-nm CMOS for 56-Gb/s wireline receiver. A-SSCC 2024: 1-3

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last updated on 2025-08-15 01:30 CEST by the dblp team
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