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ORCIDJunzhong Shen
- > Home > Persons > Junzhong Shen
Publications
- 2025
[j8]Minjin Tang
, Mei Wen, Jianchao Yang, Zeyu Xue, Junzhong Shen:
SPSA: Exploring Sparse-Packing Computation on Systolic Arrays From Scratch. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(2): 497-511 (2025)- [c26]Jingkui Yang, Mei Wen, Junzhong Shen, Jianchao Yang, Yasong Cao, Jun He, Minjin Tang, Zhaoyun Chen, Yang Shi:
SparSynergy: Unlocking Flexible and Efficient DNN Acceleration Through Multi-Level Sparsity. DATE 2025: 1-7 - 2024
- [c22]Minjin Tang, Mei Wen, Junzhong Shen, Jingkui Yang, Zeyu Xue, Zili Shao:
MSA2: An Efficient Sparsity-Aware Accelerator for Matrix Multiplication with Multi-core Systolic Arrays. ICA3PP (3) 2024: 263-282 - 2022
- [c18]Yasong Cao, Mei Wen, Junzhong Shen, Sheng Liu, Zhi Wang, Minjin Tang, Yahao Fang, Jianchao Yang, Renyu Yang, Yuhan Kang, Jiawei Fei:
MZ Core: An Enhanced Matrix Acceleration Engine for HPC/ AI Applications. HPCC/DSS/SmartCity/DependSys 2022: 126-134 - [c17]Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang:
BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays. ICCD 2022: 415-418 - [c16]Minjin Tang, Mei Wen, Yasong Cao, Junzhong Shen, Jianchao Yang, Jiawei Fei, Yang Guo, Sheng Liu:
Mentha: Enabling Sparse-Packing Computation on Systolic Arrays. ICPP 2022: 18:1-18:11 - [i3]Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang:
BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays. CoRR abs/2209.09434 (2022) - 2021
- [c12]Jianchao Yang, Mei Wen, Minjin Tang, Junzhong Shen, Chunyuan Zhang:
SAI: Self-Adjusting Incremental Quantile Estimation for Sparse Training of Neural Networks on Hardware Accelerators. HPCC/DSS/SmartCity/DependSys 2021: 1049-1058 - 2020
- [c11]Minjin Tang, Mei Wen, Junzhong Shen, Xiaolei Zhao, Chunyuan Zhang:
Towards Memory-Efficient Streaming Processing with Counter-Cascading Sketching on FPGA. DAC 2020: 1-6 - [c10]Junzhong Shen, Mei Wen, Minjin Tang, Xiaolei Zhao, Chunyuan Zhang:
Scalable FPGA-based Architecture for High-Performance Per-Flow Traffic Measurement. FPGA 2020: 315
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