Comparative Study of Safety and Security-Protected AES Designs - Daniel Thirion; Jean-Marc Daveau; Valentin Egloff; David Hély; Vincent Beroulle; Philippe Roche (28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2025, Lyon, France, May 5-7, 2025, 2025)

Reliability Qualification Challenges and Flow for Analog Qualification Test Vehicle - Nisha Gupta; Anuj Gupta; Shobhna Shukla; Janit Kumar; Philippe Roche (IEEE International Reliability Physics Symposium, IRPS 2025, Monterey, CA, USA, March 30 - April 3, 2025, 2025)

Approximate Analytical Model Evaluating Digital Systems Compliance with Automotive Standards - Esther Goudet; Fabio Sureau; Manan Kaila; Rémi Germe; Luis Peña Treviño; Jean-Marc Daveau; Lirida Naviner; Philippe Roche (26th IEEE Latin American Test Symposium, LATS 2025, San Andres Islas, Colombia, March 11-14, 2025, 2025)

On Hardware Security and Trust for Chiplet-Based 2.5D and 3D ICs: Challenges and Innovations - Juan Suzano; Fady Abouzeid; Giorgio Di Natale; Anthony Philippe; Philippe Roche (IEEE Access, 2024)

Analysis of Combinational Circuit Failure Rate based on Graph Partitioning and Probabilistic Binomial Approach - Esther Goudet; Fabio Sureau; Paul Breuil; Luis Peña Treviño; Lirida A. B. Naviner; Jean-Marc Daveau; Philippe Roche (J. Electron. Test., 2024)

IEEE 1838 compliant scan encryption and integrity for 2.5/3D ICs - Juan Suzano; Antoine Chastand; Emanuele Valea; Giorgio Di Natale; Anthony Philippe; Fady Abouzeid; Philippe Roche (IEEE European Test Symposium, ETS 2024, The Hague, Netherlands, May 20-24, 2024, 2024)

Formal Resilience Metric Characterization in Complex Digital Systems - Damiano Zuccalà; Jean-Marc Daveau; Philippe Roche; Katell Morin-Allory (IEEE European Test Symposium, ETS 2024, The Hague, Netherlands, May 20-24, 2024, 2024)

Formal Fault Injection in Digital Blocks with Mined Assertions - Damiano Zuccalà; Paul Breuil; Jean-Marc Daveau; Philippe Roche; Katell Morin-Allory (22nd ACM-IEEE International Symposium on Formal Methods and Models for System Design, MEMOCODE 2024, Raleigh, NC, USA, October 3-4, 2024, 2024)

Drift of Combinational Circuits Failure Rates with a Probabilistic Model Approximated by Partitioning - Esther Goudet; Luis Peña Treviño; Gutemberg G. dos Santos Júnior; Sayah El Hajji; Fabio Sureau; Lirida Naviner; Jean-Marc Daveau; Philippe Roche (37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, SBCCI 2024, Joao Pessoa, Brazil, September 2-6, 2024, 2024)

Formal Temporal Characterization of Register Vulnerability in Digital Circuits - Damiano Zuccalà; Jean-Marc Daveau; Philippe Roche; Katell Morin-Allory (IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2023, Foz do Iguacu, Brazil, June 20-23, 2023, 2023)

Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioning - Esther Goudet; Luis Peña Treviño; Lirida A. B. Naviner; Jean-Marc Daveau; Philippe Roche (24th IEEE Latin American Test Symposium, LATS 2023, Veracruz, Mexico, March 21-24, 2023, 2023)

Software Product Reliability Based on Basic Block Metrics Recomposition - Tiziano Fiorucci; Giorgio Di Natale; Jean-Marc Daveau; Philippe Roche (28th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2022, Torino, Italy, September 12-14, 2022, 2022)

FIRECAP: Fail-Reason Capturing hardware module for a RISC-V based System on a Chip - Sébastien Thomet; Serge De Paoli; Jean-Marc Daveau; Valérie Bertin; Fady Abouzeid; Philippe Roche; Fakhreddine Ghaffari; Olivier Romain (36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, 2021)

Automated Dysfunctional Model Extraction for Model Based Safety Assessment of Digital Systems - Tiziano Fiorucci; Jean-Marc Daveau; Giorgio Di Natale; Philippe Roche (27th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2021, Torino, Italy, June 28-30, 2021, 2021)

CovaDOTS: In Silico Chemistry-Driven Tool to Design Covalent Inhibitors Using a Linking Strategy - Laurent Hoffer; Magali Saez-Ayala; Dragos Horvath; Alexandre Varnek; Xavier Morelli; Philippe Roche (J. Chem. Inf. Model., 2019)

A 2.7 pJ/cycle 16 MHz, 0.7 \(μ\)W Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI - Guenole Lallement; Fady Abouzeid; Martin Cochet; Jean-Marc Daveau; Philippe Roche; Jean-Luc Autran (IEEE J. Solid State Circuits, 2018)

A 140 nW, 32.768 kHz, 1.9 ppm/°C Leakage-Based Digitally Relocked Clock Reference with 0.1 ppm Long-Term Stability in 28nm FD-SOI - Guenole Lallement; Fady Abouzeid; Thierry Di Gilio; Philippe Roche; Jean-Luc Autran (IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018, 2018)

Q-Learning-based Adaptive Power Management for IoT System-on-Chips with Embedded Power States - Yvan Debizet; Guénolé Lallement; Fady Abouzeid; Philippe Roche; Jean-Luc Autran (IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, 2018)

Multi-Poisson process analysis of real-time soft-error rate measurements in bulk 65 nm and 40 nm SRAMs - Soilihi Moindjie; Jean-Luc Autran; Daniela Munteanu; Gilles Gasiot; Philippe Roche (Microelectron. Reliab., 2017)

A 0.40pJ/cycle 981 \(μ\)m\(^2\) voltage scalable digital frequency generator for SoC clocking - Martin Cochet; Sylvain Clerc; Guenole Lallement; Fady Abouzeid; Philippe Roche; Jean-Luc Autran (IEEE Asian Solid-State Circuits Conference, A-SSCC 2017, Seoul, Korea (South), November 6-8, 2017, 2017)

A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI - Guenole Lallement; Fady Abouzeid; Martin Cochet; Jean-Marc Daveau; Philippe Roche; Jean-Luc Autran (43rd IEEE European Solid State Circuits Conference, ESSCIRC 2017, Leuven, Belgium, September 11-14, 2017, 2017)

2P2Idb v2: update of a structural database dedicated to orthosteric modulation of protein-protein interactions - Marie Jeanne Basse; Stéphane Betzi; Xavier Morelli; Philippe Roche (Database J. Biol. Databases Curation, 2016)

On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC - Martin Cochet; Alberto Puggelli; Ben Keller; Brian Zimmer; Milovan Blagojevic; Sylvain Clerc; Philippe Roche; Jean-Luc Autran; Borivoje Nikolic (IEEE Asian Solid-State Circuits Conference, A-SSCC 2016, Toyama, Japan, November 7-9, 2016, 2016)

30% static power improvement on ARM Cortex\(^®\)-A53 using static biasing-anticipation - Fady Abouzeid; Christophe Bernicot; Sylvain Clerc; Jean-Marc Daveau; Gilles Gasiot; Daniel Noblet; Dimitri Soussan; Philippe Roche (ESSCIRC Conference 2016: 42\(^nd\) European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016, 2016)

A 28nm FD-SOI standard cell 0.6-1.2V open-loop frequency multiplier for low power SoC clocking - Martin Cochet; Sylvain Clerc; Mehdi Naceur; Pierre Schamberger; Damien Croain; Jean-Luc Autran; Philippe Roche (IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016, 2016)

ASTEP (2005-2015): Ten years of soft error and atmospheric radiation characterization on the Plateau de Bure - Jean-Luc Autran; Daniela Munteanu; Soilihi Moindjie; Tarek Saad Saoud; S. Sauze; Gilles Gasiot; Philippe Roche (Microelectron. Reliab., 2015)

28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processors - Fady Abouzeid; Sylvain Clerc; Cyril Bottoni; Benjamin Coeffic; Jean-Marc Daveau; Damien Croain; Gilles Gasiot; Dimitri Soussan; Philippe Roche (ESSCIRC Conference 2015 - 41\(^st\) European Solid-State Circuits Conference, Graz, Austria, September 14-18, 2015, 2015)

Muons and thermal neutrons SEU characterization of 28nm UTBB FD-SOI and Bulk eSRAMs - Gilles Gasiot; Dimitri Soussan; Jean-Luc Autran; Victor Malherbe; Philippe Roche (IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015, 2015)

Alpha soft error rate of FDSOI 28 nm SRAMs: Experimental testing and simulation analysis - Victor Malherbe; Gilles Gasiot; Dimitri Soussan; Aurelien Patris; Jean-Luc Autran; Philippe Roche (IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015, 2015)

Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test - Cyril Bottoni; Benjamin Coeffic; Jean-Marc Daveau; Gilles Gasiot; Fady Abouzeid; Sylvain Clerc; Lirida A. B. Naviner; Philippe Roche (IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015, 2015)

Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology - Sylvain Clerc; Fady Abouzeid; Darayus Adil Patel; Jean-Marc Daveau; Cyril Bottoni; Lorenzo Ciampolini; Fabien Giner; David Meyer; Robin Wilson; Philippe Roche; Sylvie Naudet; Arnaud Virazel; et al. (Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015, 2015)

8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing - Sylvain Clerc; Mehdi Saligane; Fady Abouzeid; Martin Cochet; Jean-Marc Daveau; Cyril Bottoni; David Bol; Julien De Vos; Dominique Zamora; Benjamin Coeffic; Dimitri Soussan; Damien Croain; et al. (2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015, 2015)

Partial triplication of a SPARC-V8 microprocessor using fault injection - Cyril Bottoni; Benjamin Coeffic; Jean-Marc Daveau; Lirida A. B. Naviner; Philippe Roche (IEEE 6th Latin American Symposium on Circuits & Systems, LASCAS 2015, Montevideo, Uruguay, February 24-27, 2015, 2015)

Scalable 0.35 V to 1.2 V SRAM Bitcell Design From 65 nm CMOS to 28 nm FDSOI - Fady Abouzeid; Audrey Bienfait; Kaya Can Akyel; Anis Feki; Sylvain Clerc; Lorenzo Ciampolini; Fabien Giner; Robin Wilson; Philippe Roche (IEEE J. Solid State Circuits, 2014)

Real-time soft-error rate measurements: A review - Jean-Luc Autran; Daniela Munteanu; Philippe Roche; Gilles Gasiot (Microelectron. Reliab., 2014)

Particle Monte Carlo modeling of single-event transient current and charge collection in integrated circuits - Jean-Luc Autran; Maximilien Glorieux; Daniela Munteanu; Sylvain Clerc; Gilles Gasiot; Philippe Roche (Microelectron. Reliab., 2014)

27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking - Robin Wilson; Edith Beigné; Philippe Flatresse; Alexandre Valentian; Fady Abouzeid; Thomas Benoist; Christian Bernard; Sebastien Bernard; Olivier Billoint; Sylvain Clerc; Bastien Giraud; Anuj Grover; et al. (2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014, 2014)

2P2Idb: a structural database dedicated to orthosteric modulation of protein-protein interactions - Marie Jeanne Basse; Stéphane Betzi; Raphaël Bourgeas; Sofia Bouzidi; Bernard Chétrit; Véronique Hamon; Xavier Morelli; Philippe Roche (Nucleic Acids Res., 2013)

Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs - Edith Beigné; Alexandre Valentian; Bastien Giraud; Olivier Thomas; Thomas Benoist; Yvain Thonnart; Serge Bernard; Guillaume Moritz; Olivier Billoint; Y. Maneglia; Philippe Flatresse; Jean-Philippe Noel; et al. (Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, 2013)

Scalable 0.35V to 1.2V SRAM bitcell design from 65nm CMOS to 28nm FDSOI - Fady Abouzeid; Audrey Bienfait; Kaya Can Akyel; Sylvain Clerc; Lorenzo Ciampolini; Philippe Roche (ESSCIRC 2013 - Proceedings of the 39th European Solid-State Circuits Conference, Bucharest, Romania, September 16-20, 2013, 2013)

28nm CMOS, energy efficient and variability tolerant, 350mV-to-1.0V, 10MHz/700MHz, 252bits frame error-decoder - Fady Abouzeid; Sylvain Clerc; Bertrand Pelloux-Prayer; Fabrice Argoud; Philippe Roche (Proceedings of the 38th European Solid-State Circuit conference, ESSCIRC 2012, Bordeaux, France, September 17-21, 2012, 2012)

A 65nm SRAM achieving 250mV retention and 350mV, 1MHz, 55fJ/bit access energy, with bit-interleaved radiation Soft Error tolerance - Sylvain Clerc; Fady Abouzeid; Gilles Gasiot; David Gauthier; Philippe Roche (Proceedings of the 38th European Solid-State Circuit conference, ESSCIRC 2012, Bordeaux, France, September 17-21, 2012, 2012)

A 0.32V, 55fJ per bit access energy, CMOS 65nm bit-interleaved SRAM with radiation Soft Error tolerance - Sylvain Clerc; Fady Abouzeid; Gilles Gasiot; David Gauthier; Dimitri Soussan; Philippe Roche (IEEE International Conference on IC Design & Technology, ICICDT 2012, Austin, TX, USA, May 30 - June 1, 2012, 2012)

A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform - Sylvain Clerc; Fady Abouzeid; Fabrice Argoud; Abhay Kumar; Rajesh Kumar; Philippe Roche (18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011, 2011)

An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities - Josep Torras Flaquer; Jean-Marc Daveau; Lirida A. B. Naviner; Philippe Roche (17th IEEE International On-Line Testing Symposium (IOLTS 2011), 13-15 July, 2011, Athens, Greece, 2011)

Fast reliability analysis of combinatorial logic circuits using conditional probabilities - Josep Torras Flaquer; Jean-Marc Daveau; Lirida A. B. Naviner; Philippe Roche (Microelectron. Reliab., 2010)

Soft-errors induced by terrestrial neutrons and natural alpha-particle emitters in advanced memory circuits at ground level - Jean-Luc Autran; Daniela Munteanu; Philippe Roche; Gilles Gasiot; S. Martinie; S. Uznanski; S. Sauze; S. Semikh; Evgeny Yakushev; S. Rozov; Pia Loaiza; G. Warot; et al. (Microelectron. Reliab., 2010)

Verification of soft error detection mechanism through fault injection on hardware emulation platform - Oscar Bailan; Umberto Rossi; Anne Wantens; Jean-Marc Daveau; Salvatore Nappi; Philippe Roche (IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2010), Chicago, Illinois, USA, June 28 - July 1, 2010, 2010)

Handling reconvergent paths using conditional probabilities in combinatorial logic netlist reliability estimation - Josep Torras Flaquer; Jean-Marc Daveau; Lirida A. B. Naviner; Philippe Roche (17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, Athens, Greece, 12-15 December, 2010, 2010)

Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system - Pierre Vanhauwaert; Michele Portolan; Régis Leveugle; Philippe Roche (15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008, 2008)

Growing Interest of Advanced Commercial CMOS Technologies for Space and Medical Applications. Illustration with a New Nano-Power and Radiation-Hardened SRAM in 130nm CMOS - Philippe Roche; Mark Lysinger; Gilles Gasiot; Jean-Marc Daveau; Mehdi Zamanian; Pierre Dautriche (14th IEEE International On-Line Testing Symposium (IOLTS 2008), 7-9 July 2008, Rhodes, Greece, 2008)

A Radiation Hardened Nano-Power 8Mb SRAM in 130nm CMOS - Mark Lysinger; François Jacquet; Mehdi Zamanian; David McClure; Philippe Roche; Naren Sahoo; John Russell (9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, 2008)

A Flexible SoPC-based Fault Injection Environment - Pierre Vanhauwaert; Régis Leveugle; Philippe Roche (Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), Prague, Czech Republic, April 18-21, 2006, 2006)

Factors That Impact the Critical Charge of Memory Elements - Tino Heijmen; Damien Giot; Philippe Roche (12th IEEE International On-Line Testing Symposium (IOLTS 2006), 10-12 July 2006, Como, Italy, 2006)

Reduced Instrumentation and Optimized Fault Injection Control for Dependability Analysis - Pierre Vanhauwaert; Régis Leveugle; Philippe Roche (IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, 2006)