A 10.1" 183-\(μ\)W/electrode, 0.73-mm2/sensor High-SNR 3-D Hover Sensor Based on Enhanced Signal Refining and Fine Error Calibrating Techniques - Yeunhee Huh; Sung-Wan Hong; Sang-Hui Park; Changsik Shin; Jun-Suk Bang; Changbyung Park; Sungsoo Park; Gyu-Hyeong Cho (IEEE J. Solid State Circuits, 2018)

A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple - Se-Un Shin; Yeunhee Huh; Yong-Min Ju; Sung-Won Choi; Changsik Shin; Young-Jin Woo; Minseong Choi; Se-Hong Park; Young-Hoon Sohn; Min-Woo Ko; Youngsin Jo; Hyun-Ki Han; et al. (2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, 2018)

A reconfigurable SIMO system with 10-output dual-bus DC-DC converter using the load balancing function in group allocator for diversified load condition - Se-un Shin; Min-Yong Jung; Kiduk Kim; Sang-Hui Park; Yeunhee Huh; Changsik Shin; Se-Hong Park; Jun-Suk Bang; Jong-Beom Baek; Sung-Won Choi; Yong-Min Ju; Gyu-Hyeong Cho (2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016, 2016)

12.1 A 0.518mm\(^2\) quasi-current-mode hysteretic buck DC-DC converter with 3\(μ\)s load transient response in 0.35\(μ\)m BCDMOS - Sang-Han Lee; Jun-Suk Bang; Kye-Seok Yoon; Sung-Wan Hong; Changsik Shin; Min-Yong Jung; Gyu-Hyeong Cho (2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015, 2015)

Sampling Correlation Sources for Timing Yield Analysis of Sequential Circuits with Clock Networks - Lee-eun Yu; Changsik Shin; Seungwhun Paik; Jing-Jia Liou; Youngsoo Shin (J. Circuits Syst. Comput., 2011)

ssr HLShbox-ssr pg: High-Level Synthesis of Power-Gated Circuits - Eunjoo Choi; Changsik Shin; Youngsoo Shin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Power-gating-aware high-level synthesis - Eunjoo Choi; Changsik Shin; Taewhan Kim; Youngsoo Shin (Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008, 2008)