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ORCIDAntonis Papanikolaou
Person information
- affiliation: Hypertech SA, Athens, Greece
- affiliation (former): National Technical University of Athens, School of Electrical and Computer Engineering, MicroLab, Athens, Greece
- affiliation (former): Inter-University Microelectronics Center (IMEC), Leuven, Belgium
- affiliation (former): University of Patras, Greece
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2010 – 2019
- 2018
[c30]Konstantinos Tzanidakis, Christos Malavazos, Kostas Tsatsakis, Antonis Papanikolaou
, Tasos Tsitsanis, Brendan O'Flynn:
Optimized Consumer-Centric Demand Response. GIoTS 2018: 1-6- 2015
- [j8]Dimitrios Rodopoulos, Georgia Psychou, Mohamed M. Sabry, Francky Catthoor, Antonis Papanikolaou, Dimitrios Soudris, Tobias G. Noll, David Atienza:
Classification Framework for Analysis and Modeling of Physically Induced Reliability Violations. ACM Comput. Surv. 47(3): 38:1-38:33 (2015) - [j7]Dimitrios Rodopoulos, Antonis Papanikolaou, Francky Catthoor, Dimitrios Soudris:
Demonstrating HW-SW Transient Error Mitigation on the Single-Chip Cloud Computer Data Plane. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 507-519 (2015) - [c29]Christos Malavazos, Antonis Papanikolaou, Konstantinos Tsatsakis, E. Hatzoplaki:
Combined Visual Comfort and Energy Efficiency through True Personalization of Automated Lighting Control. SMARTGREENS 2015: 264-270 - [c28]Jörg Benze, Andreas Lang, Antonis Papanikolaou, Tim Dethlefs, Wolfgang Renz, Andrea Schröder:
Open system for energy services (OS4ES): An EU-funded research project to establish a non-discriminatory, multivendor-capability service delivery platform for smart grid services. SmartGridComm 2015: 593-598 - 2013
- [j6]Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor:
Enabling Efficient System Configurations for Dynamic Wireless Applications Using System Scenarios. Int. J. Wirel. Inf. Networks 20(2): 140-156 (2013) - [c27]Grigorios Lyras, Dimitrios Rodopoulos, Antonis Papanikolaou, Dimitrios Soudris:
Hypervised transient SPICE simulations of large netlists & workloads on multi-processor systems. DATE 2013: 655-658 - [c26]Anuj Sharma, Antonis Papanikolaou, Elias S. Manolakos:
Accelerating All-to-All Protein Structures Comparison with TMalign Using a NoC Many-Cores Processor Architecture. IPDPS Workshops 2013: 510-519 - 2011
- [c25]Filippos Toufexis, Antonis Papanikolaou, Dimitrios Soudris, George I. Stamoulis, Sotiris Bantas:
Power, performance and area prediction of 3D ICs during early stage design exploration in 45nm. ICECS 2011: 715-718 - [c24]Kostas Siozios, Antonis Papanikolaou, Dimitrios Soudris:
CAD tools for designing 3D integrated systems. ISCAS 2011: 2229-2232 - [c23]Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor:
Enabling efficient system configurations for dynamic wireless baseband engines using system scenarios. SiPS 2011: 305-310 - 2010
- [j5]Kris Heyrman, Antonis Papanikolaou, Francky Catthoor, Peter Veelaert, Wilfried Philips:
Control for Power Gating of Wires. IEEE Trans. Very Large Scale Integr. Syst. 18(9): 1287-1300 (2010) - [c22]Alienor Richard, Dragomir Milojevic, Frédéric Robert, Alexandros Bartzas, Antonis Papanikolaou, Kostas Siozios, Dimitrios Soudris:
Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's. ARCS Workshops 2010: 319-324 - [c21]Ioannis Koutras, Antonis Papanikolaou, George Economakos, Dimitrios Soudris:
BIT-width exploration over 3D architectures using high-level synthesis. ICECS 2010: 535-538 - [c20]Dimitris Bekiaris, Antonis Papanikolaou, Christos Papameletis, Dimitrios Soudris, George Economakos, Kiamal Z. Pekmestzi:
A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework. PATMOS 2010: 73-83
2000 – 2009
- 2009
- [j4]Paul Marchal, Bruno Bougard, Guruprasad Katti, Michele Stucchi, Wim Dehaene, Antonis Papanikolaou, Diederik Verkest, Bart Swinnen, Eric Beyne:
3-D Technology Assessment: Path-Finding the Technology/Design Sweet-Spot. Proc. IEEE 97(1): 96-107 (2009) - [c19]Concepción Sanz, Manuel Prieto, José Ignacio Gómez, Antonis Papanikolaou, Francky Catthoor:
System-level process variability compensation on memory organizations: on the scalability of multi-mode memories. ASP-DAC 2009: 254-259 - 2008
- [j3]Concepción Sanz, Manuel Prieto, José Ignacio Gómez, Antonis Papanikolaou, Miguel Miranda, Francky Catthoor:
Combining system scenarios and configurable memories to tolerate unpredictability. ACM Trans. Design Autom. Electr. Syst. 13(3): 49:1-49:7 (2008) - [c18]Jin Guo, Antonis Papanikolaou, Michele Stucchi, Kristof Croes, Zsolt Tokei, Francky Catthoor:
A tool flow for predicting system level timing failures due to interconnect reliability degradation. ACM Great Lakes Symposium on VLSI 2008: 291-296 - 2007
- [j2]Jin Guo, Antonis Papanikolaou, H. Zhang, Francky Catthoor:
Energy/Area/Delay Tradeoffs in the Physical Design of On-Chip Segmented Bus Architecture. IEEE Trans. Very Large Scale Integr. Syst. 15(8): 941-944 (2007) - [c17]Jin Guo, Antonis Papanikolaou, Francky Catthoor:
Topology exploration for energy efficient intra-tile communication. ASP-DAC 2007: 178-183 - [c16]Antonis Papanikolaou, Miguel Miranda, Pol Marchal, Bart Dierickx, Francky Catthoor:
At Tape-out: Can System Yield in Terms of Timing/Energy Specifications Be Predicted? CICC 2007: 773-778 - [c15]Antonis Papanikolaou, Hua Wang, Miguel Miranda, Francky Catthoor:
Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design. IOLTS 2007: 121 - [c14]Kris Heyrman, Antonis Papanikolaou, Francky Catthoor, Peter Veelaert, Wilfried Philips:
Using a Linear Sectioned Bus And a Communication Processor to Reduce Energy Costs in Synchronous On-Chip Communication. SoC 2007: 1-4 - 2006
- [c13]Kris Heyrman, Antonis Papanikolaou, Francky Catthoor, Peter Veelaert, Koen De Bosschere, Wilfried Philips:
Energy Consumption for Transport of Control Information on a Segmented Software-Controlled Communication Architecture. ARC 2006: 52-58 - [c12]Jin Guo, Antonis Papanikolaou, Pol Marchal, Francky Catthoor:
Physical design implementation of segmented buses to reduce communication energy. ASP-DAC 2006: 42-47 - [c11]Antonis Papanikolaou, T. Grabner, Miguel Miranda, Philippe Roussel, Francky Catthoor:
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations. CODES+ISSS 2006: 253-258 - [c10]Concepción Sanz, Manuel Prieto, Antonis Papanikolaou, Miguel Miranda, Francky Catthoor:
System-level process variability compensation on memory organizations of dynamic applications: a case study. ISQED 2006: 376-382 - [c9]Jin Guo, Antonis Papanikolaou, Pol Marchal, Francky Catthoor:
Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture. SLIP 2006: 75-81 - [c8]Antonis Papanikolaou, Hua Wang, Miguel Miranda, Francky Catthoor, Wim Dehaene:
Reliability Issues in Deep Deep Submicron Technologies: Time-Dependent Variability and its Impact on Embedded System Design. VLSI-SoC (Selected Papers) 2006: 119-141 - [c7]Antonis Papanikolaou, Miguel Miranda, Hua Wang, Francky Catthoor, M. Satyakiran, Pol Marchal, Ben Kaczer, C. Bruynseraede, Zsolt Tokei:
Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design. VLSI-SoC 2006: 342-347 - 2005
- [j1]Hua Wang, Miguel Miranda, Antonis Papanikolaou, Francky Catthoor, Wim Dehaene:
Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1127-1135 (2005) - [c6]Antonis Papanikolaou, F. Lobmaier, Hua Wang, Miguel Miranda, Francky Catthoor:
A system-level methodology for fully compensating process variability impact of memory organizations in periodic applications. CODES+ISSS 2005: 117-122 - [c5]Antonis Papanikolaou, F. Starzer, Miguel Miranda, Koenraad De Bosschere, Francky Catthoor:
Architectural and Physical Design Optimizations for Efficient Intra-tile Communication. SoC 2005: 112-115 - 2004
- [c4]Hua Wang, Antonis Papanikolaou, Miguel Miranda, Francky Catthoor:
A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement. ASP-DAC 2004: 759-761 - [c3]Antonis Papanikolaou, Miguel Miranda, Francky Catthoor:
Overcoming the "Memory Wall" by improved system design exploration and a link to process technology options. Conf. Computing Frontiers 2004: 202-211 - 2003
- [c2]Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex:
Global interconnect trade-off for technology over memory modules to application level: case study. SLIP 2003: 125-132 - 2002
- [c1]Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex:
Interconnect exploration for future wire dominated technologies. SLIP 2002: 105-106
Coauthor Index
aka: Miguel Miranda
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