GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs. - Boden, Maik; Fiebig, Thomas; Reiband, Markus; Reichel, Peter; Rülke, Steffen (2008)

High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs. - Boden, Maik; Fiebig, Thomas; Meibner, Torsten; Rülke, Steffen; Becker, Jürgen (2007)

A high-level target-precise model for designing reconfigurable HW tasks. - Boden, Maik; Rülke, Steffen; Becker, Jürgen (2006)

A Low-Cost Realization of an Adaptable Protocol Processing Unit. - Boden, Maik; Gleich, Alex; Rülke, Steffen; Nageldinger, Ulrich (2005)

Cost-Efficient Implementation of Adaptive Finite State Machines. - Boden, Maik; Koegst, Manfred; Badía, José Luis Tiburcio; Rülke, Steffen (2004)

Enhanced Reusability for SoC-Based HW/SW Co-Design. - Boden, Maik; Schneider, Jörg; Feske, Klaus; Rülke, Steffen (2002)

Eine wiederverwendungsgerechte Entwurfsmethodik für rekonfigurierbare SoC-Architekturen. - Schneider, Jörg; Boden, Maik; Rülke, Steffen (2002)