BibTeX records: Bo-Yuan Huang 0001

download as .bib file

@article{DBLP:journals/todaes/HuangLLHSTGCCWGTM24,
  author       = {Bo{-}Yuan Huang and
                  Steven Lyubomirsky and
                  Yi Li and
                  Mike He and
                  Gus Henry Smith and
                  Thierry Tambe and
                  Akash Gaonkar and
                  Vishal Canumalla and
                  Andrew Cheung and
                  Gu{-}Yeon Wei and
                  Aarti Gupta and
                  Zachary Tatlock and
                  Sharad Malik},
  title        = {Application-level Validation of Accelerator Designs Using a Formal
                  Software/Hardware Interface},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {29},
  number       = {2},
  pages        = {35:1--35:25},
  year         = {2024},
  url          = {https://doi.org/10.1145/3639051},
  doi          = {10.1145/3639051},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/HuangLLHSTGCCWGTM24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/HuangZGM23,
  author       = {Bo{-}Yuan Huang and
                  Hongce Zhang and
                  Aarti Gupta and
                  Sharad Malik},
  title        = {{INVITED:} Generalizing the {ISA} to the {ILA:} {A} Software/Hardware
                  Interface for Accelerator-rich Platforms},
  booktitle    = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
                  CA, USA, July 9-13, 2023},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/DAC56929.2023.10247894},
  doi          = {10.1109/DAC56929.2023.10247894},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/HuangZGM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2203-00218,
  author       = {Bo{-}Yuan Huang and
                  Steven Lyubomirsky and
                  Yi Li and
                  Mike He and
                  Thierry Tambe and
                  Gus Henry Smith and
                  Akash Gaonkar and
                  Vishal Canumalla and
                  Gu{-}Yeon Wei and
                  Aarti Gupta and
                  Zachary Tatlock and
                  Sharad Malik},
  title        = {Specialized Accelerators and Compiler Flows: Replacing Accelerator
                  APIs with a Formal Software/Hardware Interface},
  journal      = {CoRR},
  volume       = {abs/2203.00218},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2203.00218},
  doi          = {10.48550/ARXIV.2203.00218},
  eprinttype    = {arXiv},
  eprint       = {2203.00218},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2203-00218.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/Zeng0ZGM21,
  author       = {Yu Zeng and
                  Bo{-}Yuan Huang and
                  Hongce Zhang and
                  Aarti Gupta and
                  Sharad Malik},
  title        = {Generating Architecture-Level Abstractions from {RTL} Designs for
                  Processors and Accelerators Part {I:} Determining Architectural State
                  Variables},
  booktitle    = {{IEEE/ACM} International Conference On Computer Aided Design, {ICCAD}
                  2021, Munich, Germany, November 1-4, 2021},
  pages        = {1--9},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ICCAD51958.2021.9643584},
  doi          = {10.1109/ICCAD51958.2021.9643584},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/Zeng0ZGM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sigsoft/GodefroidHP20,
  author       = {Patrice Godefroid and
                  Bo{-}Yuan Huang and
                  Marina Polishchuk},
  editor       = {Prem Devanbu and
                  Myra B. Cohen and
                  Thomas Zimmermann},
  title        = {Intelligent {REST} {API} data fuzzing},
  booktitle    = {{ESEC/FSE} '20: 28th {ACM} Joint European Software Engineering Conference
                  and Symposium on the Foundations of Software Engineering, Virtual
                  Event, USA, November 8-13, 2020},
  pages        = {725--736},
  publisher    = {{ACM}},
  year         = {2020},
  url          = {https://doi.org/10.1145/3368089.3409719},
  doi          = {10.1145/3368089.3409719},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sigsoft/GodefroidHP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/HuangZSVGM19,
  author       = {Bo{-}Yuan Huang and
                  Hongce Zhang and
                  Pramod Subramanyan and
                  Yakir Vizel and
                  Aarti Gupta and
                  Sharad Malik},
  title        = {Instruction-Level Abstraction {(ILA):} {A} Uniform Specification for
                  System-on-Chip (SoC) Verification},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {24},
  number       = {1},
  pages        = {10:1--10:24},
  year         = {2019},
  url          = {https://doi.org/10.1145/3282444},
  doi          = {10.1145/3282444},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/HuangZSVGM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/tacas/HuangZGM19,
  author       = {Bo{-}Yuan Huang and
                  Hongce Zhang and
                  Aarti Gupta and
                  Sharad Malik},
  editor       = {Tom{\'{a}}s Vojnar and
                  Lijun Zhang},
  title        = {ILAng: {A} Modeling and Verification Platform for SoCs Using Instruction-Level
                  Abstractions},
  booktitle    = {Tools and Algorithms for the Construction and Analysis of Systems
                  - 25th International Conference, {TACAS} 2019, Held as Part of the
                  European Joint Conferences on Theory and Practice of Software, {ETAPS}
                  2019, Prague, Czech Republic, April 6-11, 2019, Proceedings, Part
                  {I}},
  series       = {Lecture Notes in Computer Science},
  volume       = {11427},
  pages        = {351--357},
  publisher    = {Springer},
  year         = {2019},
  url          = {https://doi.org/10.1007/978-3-030-17462-0\_21},
  doi          = {10.1007/978-3-030-17462-0\_21},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/tacas/HuangZGM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/SubramanyanHVGM18,
  author       = {Pramod Subramanyan and
                  Bo{-}Yuan Huang and
                  Yakir Vizel and
                  Aarti Gupta and
                  Sharad Malik},
  title        = {Template-Based Parameterized Synthesis of Uniform Instruction-Level
                  Abstractions for SoC Verification},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {37},
  number       = {8},
  pages        = {1692--1705},
  year         = {2018},
  url          = {https://doi.org/10.1109/TCAD.2017.2764482},
  doi          = {10.1109/TCAD.2017.2764482},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/SubramanyanHVGM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/HuangRGFM18,
  author       = {Bo{-}Yuan Huang and
                  Sayak Ray and
                  Aarti Gupta and
                  Jason M. Fung and
                  Sharad Malik},
  title        = {Formal security verification of concurrent firmware in SoCs using
                  instruction-level abstraction for hardware},
  booktitle    = {Proceedings of the 55th Annual Design Automation Conference, {DAC}
                  2018, San Francisco, CA, USA, June 24-29, 2018},
  pages        = {91:1--91:6},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3195970.3196055},
  doi          = {10.1145/3195970.3196055},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/HuangRGFM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/XingHGM18,
  author       = {Yue Xing and
                  Bo{-}Yuan Huang and
                  Aarti Gupta and
                  Sharad Malik},
  editor       = {Iris Bahar},
  title        = {A formal instruction-level {GPU} model for scalable verification},
  booktitle    = {Proceedings of the International Conference on Computer-Aided Design,
                  {ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
  pages        = {130},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3240765.3240771},
  doi          = {10.1145/3240765.3240771},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/XingHGM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1801-01114,
  author       = {Bo{-}Yuan Huang and
                  Hongce Zhang and
                  Pramod Subramanyan and
                  Yakir Vizel and
                  Aarti Gupta and
                  Sharad Malik},
  title        = {Instruction-Level Abstraction {(ILA):} {A} Uniform Specification for
                  System-on-Chip (SoC) Verification},
  journal      = {CoRR},
  volume       = {abs/1801.01114},
  year         = {2018},
  url          = {http://arxiv.org/abs/1801.01114},
  eprinttype    = {arXiv},
  eprint       = {1801.01114},
  timestamp    = {Wed, 24 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1801-01114.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvt/SuH0YW17,
  author       = {Shih{-}Tang Su and
                  Bo{-}Yuan Huang and
                  Chih{-}Yu Wang and
                  Che{-}Wei Yeh and
                  Hung{-}Yu Wei},
  title        = {Protocol Design and Game Theoretic Solutions for Device-to-Device
                  Radio Resource Allocation},
  journal      = {{IEEE} Trans. Veh. Technol.},
  volume       = {66},
  number       = {5},
  pages        = {4271--4286},
  year         = {2017},
  url          = {https://doi.org/10.1109/TVT.2016.2602658},
  doi          = {10.1109/TVT.2016.2602658},
  timestamp    = {Mon, 17 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvt/SuH0YW17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/HuangLJ15,
  author       = {Bo{-}Yuan Huang and
                  Yi{-}Hsiang Lai and
                  Jie{-}Hong Roland Jiang},
  editor       = {Diana Marculescu and
                  Frank Liu},
  title        = {Asynchronous {QDI} Circuit Synthesis from Signal Transition Protocols},
  booktitle    = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
                  Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
  pages        = {434--441},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ICCAD.2015.7372602},
  doi          = {10.1109/ICCAD.2015.7372602},
  timestamp    = {Mon, 26 Jun 2023 16:43:56 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/HuangLJ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icc/HuangSWYW14,
  author       = {Bo{-}Yuan Huang and
                  Shih{-}Tang Su and
                  Chih{-}Yu Wang and
                  Che{-}Wei Yeh and
                  Hung{-}Yu Wei},
  title        = {Resource allocation in {D2D} communication - {A} game theoretic approach},
  booktitle    = {{IEEE} International Conference on Communications, {ICC} 2014, Sydney,
                  Australia, June 10-14, 2014, Workshops Proceedings},
  pages        = {483--488},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ICCW.2014.6881245},
  doi          = {10.1109/ICCW.2014.6881245},
  timestamp    = {Mon, 17 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icc/HuangSWYW14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.