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ORCIDSyed Mohsin Abbas
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2020 – today
- 2023
[j6]Syed Mohsin Abbas
, Marwan Jalaleddine, Warren J. Gross:
List-GRAND: A Practical Way to Achieve Maximum Likelihood Decoding. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 43-54 (2023)- [c10]Syed Mohsin Abbas, Chi-Ying Tsui, Marwan Jalaleddine, Warren J. Gross:
Step-GRAND: A Low Latency Universal Soft-Input Decoder. GLOBECOM (Workshops) 2023: 1668-1673 - [i9]Syed Mohsin Abbas, Marwan Jalaleddine, Chi-Ying Tsui, Warren J. Gross:
Step-GRAND: A Low Latency Universal Soft-input Decoder. CoRR abs/2307.07133 (2023) - 2022
- [j5]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 681-693 (2022) - [j4]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
Hardware Architecture for Guessing Random Additive Noise Decoding Markov Order (GRAND-MO). J. Signal Process. Syst. 94(10): 1047-1065 (2022) - [c9]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
GRAND for Rayleigh Fading Channels. GLOBECOM (Workshops) 2022: 504-509 - [i8]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
GRAND for Rayleigh Fading Channels. CoRR abs/2205.00030 (2022) - 2021
- [c8]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI Architecture for Soft-Decision Decoding with ORBGRAND. ICASSP 2021: 8288-8292 - [c7]Jiajie Li, Syed Mohsin Abbas, Thibaud Tonnellier, Warren J. Gross:
Reduced Complexity RPA Decoder for Reed-Muller Codes. ISTC 2021: 1-5 - [c6]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND Markov Order. SiPS 2021: 158-163 - [i7]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND. CoRR abs/2105.07115 (2021) - [i6]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND Markov Order. CoRR abs/2108.12563 (2021) - [i5]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
List-GRAND: A practical way to achieve Maximum Likelihood Decoding. CoRR abs/2109.12225 (2021) - [i4]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. CoRR abs/2110.13776 (2021) - 2020
- [c5]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND. SiPS 2020: 1-6 - [i3]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND. CoRR abs/2007.07328 (2020)
2010 – 2019
- 2017
- [j3]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
High-Throughput and Energy-Efficient Belief Propagation Polar Code Decoder. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1098-1111 (2017) - [c4]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Concatenated LDPC-polar codes decoding through belief propagation. ISCAS 2017: 1-4 - [i2]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Concatenated LDPC-Polar Codes Decoding Through Belief Propagation. CoRR abs/1703.05542 (2017) - 2016
- [c3]Syed Mohsin Abbas, Chi-Ying Tsui:
Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO. VLSI-SoC 2016: 1-5 - [c2]Syed Mohsin Abbas, Chi-Ying Tsui:
Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO. VLSI-SoC (Selected Papers) 2016: 192-212 - 2015
- [j2]Zhiliang Qian, Syed Mohsin Abbas, Chi-Ying Tsui:
FSNoC: A Flit-Level Speedup Scheme for Network on-Chips Using Self-Reconfigurable Bidirectional Channels. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1854-1867 (2015) - [c1]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Low complexity belief propagation polar code decoder. SiPS 2015: 1-6 - [i1]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Low Complexity Belief Propagation Polar Code Decoders. CoRR abs/1505.04979 (2015) - 2014
- [j1]Syed Mohsin Abbas, Soonyoung Lee, Sanghyeon Baeg, Sungju Park:
An Efficient Multiple Cell Upsets Tolerant Content-Addressable Memory. IEEE Trans. Computers 63(8): 2094-2098 (2014)
Coauthor Index
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