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2020 – today
- 2024
[j13]Francisco Eugenio Potestad-Ordóñez
, Alejandro Casado-Galán, Erica Tena-Sánchez:
Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs. Sensors 24(5): 1598 (2024)- [c13]Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox:
Cryptographic Security Through a Hardware Root of Trust. ARC 2024: 106-119 - 2023
- [c12]Eros Camacho-Ruiz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Erica Tena-Sánchez, Piedad Brox:
A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem. DCIS 2023: 1-6 - [c11]Virginia Zúñiga-González, Erica Tena-Sánchez, Antonio J. Acosta:
A Security Comparison between AES-128 and AES-256 FPGA implementations against DPA attacks. DCIS 2023: 1-6 - 2022
- [j12]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio J. Acosta, Carlos Jesús Jiménez-Fernández, Ricardo Chaves:
Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher. IEEE Access 10: 65548-65561 (2022) - [j11]Ignacio M. Delgado-Lozano, Erica Tena-Sánchez, Juan Núñez, Antonio J. Acosta:
Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs. IEEE Embed. Syst. Lett. 14(2): 99-102 (2022) - 2021
- [j10]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández:
Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA. IEEE Access 9: 168444-168454 (2021) - [j9]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández:
Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations. Sensors 21(22): 7596 (2021) - [j8]Ignacio M. Delgado-Lozano, Erica Tena-Sánchez, Juan Núñez, Antonio J. Acosta:
Design and Analysis of Secure Emerging Crypto-Hardware Using HyperFET Devices. IEEE Trans. Emerg. Top. Comput. 9(2): 787-796 (2021) - 2020
- [j7]Ignacio M. Delgado-Lozano, Erica Tena-Sánchez, Juan Núñez, Antonio J. Acosta:
Projection of Dual-Rail DPA Countermeasures in Future FinFET and Emerging TFET Technologies. ACM J. Emerg. Technol. Comput. Syst. 16(3): 30:1-30:16 (2020) - [c10]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Ricardo Chaves, Manuel Valencia-Barrero, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández:
Hamming-Code Based Fault Detection Design Methodology for Block Ciphers. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j6]Erica Tena-Sánchez, Antonio J. Acosta:
Logic minimization and wide fan-in issues in DPL-based cryptocircuits against power analysis attacks. Int. J. Circuit Theory Appl. 47(2): 238-253 (2019) - 2018
- [c9]Erica Tena-Sánchez, Ignacio M. Delgado-Lozano, Juan Núñez, Antonio J. Acosta:
Benchmarking of nanometer technologies for DPA-resilient DPL-based cryptocircuits. DCIS 2018: 1-6 - [c8]Erica Tena-Sánchez, Antonio J. Acosta:
Effect of Temperature Variation in Experimental DPA and DEMA Attacks. PATMOS 2018: 163-168 - 2017
- [j5]Antonio J. Acosta, Tommaso Addabbo, Erica Tena-Sánchez:
Embedded electronic circuits for cryptography, hardware security and true random number generation: an overview. Int. J. Circuit Theory Appl. 45(2): 145-169 (2017) - [j4]Antonio J. Acosta, Erica Tena-Sánchez, Carlos Jesús Jiménez-Fernández, Javier M. Mora-Merchan:
Power and Energy Issues on Lightweight Cryptography. J. Low Power Electron. 13(3): 326-337 (2017) - 2016
- [j3]Piedad Brox, Macarena C. Martínez-Rodríguez, Erica Tena-Sánchez, Iluminada Baturone, Antonio J. Acosta:
Application specific integrated circuit solution for multi-input multi-output piecewise-affine functions. Int. J. Circuit Theory Appl. 44(1): 4-20 (2016) - [c7]Erica Tena-Sánchez, Antonio J. Acosta, Juan Núñez:
Secure cryptographic hardware implementation issues for high-performance applications. PATMOS 2016: 76-83 - 2015
- [c6]Macarena C. Martínez-Rodríguez, Piedad Brox, Erica Tena, Antonio J. Acosta, Iluminada Baturone:
Programmable ASICs for model predictive control. ICIT 2015: 1593-1598 - [c5]Erica Tena-Sánchez, Antonio J. Acosta:
DPA vulnerability analysis on Trivium stream cipher using an optimized power model. ISCAS 2015: 1846-1849 - 2014
- [j2]Erica Tena-Sánchez, Javier Castro-Ramirez, Antonio J. Acosta:
A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant Circuits. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(2): 203-215 (2014) - [c4]Erica Tena-Sánchez, Javier Castro-Ramirez, Antonio J. Acosta:
Low-Power Differential Logic Gates for DPA Resistant Circuits. DSD 2014: 671-674 - [c3]Erica Tena-Sánchez, Javier Castro-Ramirez, Antonio J. Acosta:
Design and test of a low-power 90nm XOR/XNOR gate for cryptographic applications. PATMOS 2014: 1-8 - 2013
- [j1]Piedad Brox, Javier Castro-Ramirez, Macarena C. Martínez-Rodríguez, Erica Tena, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Antonio J. Acosta:
A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(12): 3182-3194 (2013) - 2012
- [c2]Macarena C. Martínez-Rodríguez, Piedad Brox, Javier Castro-Ramirez, Erica Tena, Antonio J. Acosta, Iluminada Baturone:
ASIC-in-the-loop methodology for verification of piecewise affine controllers. ICECS 2012: 388-391 - [c1]Susana Eiroa, Javier Castro-Ramirez, Macarena Cristina Martínez-Rodríguez, Erica Tena, Piedad Brox, Iluminada Baturone:
Reducing bit flipping problems in SRAM physical unclonable functions for chip identification. ICECS 2012: 392-395
Coauthor Index
aka: Antonio Acosta-Jiménez
aka: Macarena Cristina Martínez-Rodríguez
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