BibTeX records: Daniel Lima Ferrão

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@inproceedings{DBLP:conf/patmos/FerraoRG06,
  author       = {Daniel Lima Ferr{\~{a}}o and
                  Ricardo Reis and
                  Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
  editor       = {Johan Vounckx and
                  Nadine Az{\'{e}}mard and
                  Philippe Maurine},
  title        = {Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical
                  Functional Timing Analysis},
  booktitle    = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
                  and Simulation, 16th International Workshop, {PATMOS} 2006, Montpellier,
                  France, September 13-15, 2006, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {4148},
  pages        = {301--310},
  publisher    = {Springer},
  year         = {2006},
  url          = {https://doi.org/10.1007/11847083\_29},
  doi          = {10.1007/11847083\_29},
  timestamp    = {Mon, 03 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/patmos/FerraoRG06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/SantosFRG05,
  author       = {Cristiano Santos and
                  Daniel Lima Ferr{\~{a}}o and
                  Ricardo Reis and
                  Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
  title        = {Incremental timing optimization for automatic layout generation},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {3567--3570},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465400},
  doi          = {10.1109/ISCAS.2005.1465400},
  timestamp    = {Mon, 03 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/SantosFRG05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/OliveiraSFCMMBR05,
  author       = {Leonardo Londero de Oliveira and
                  Cristiano Santos and
                  Daniel Lima Ferr{\~{a}}o and
                  Eduardo A. C. da Costa and
                  Jos{\'{e}} Monteiro and
                  Jo{\~{a}}o Baptista dos Santos Martins and
                  Sergio Bampi and
                  Ricardo Augusto da Luz Reis},
  editor       = {Ricardo Augusto da Luz Reis and
                  Adam Osseiran and
                  Hans{-}J{\"{o}}rg Pfleiderer},
  title        = {A Comparison of Layout Implementations of Pipelined and Non-Pipelined
                  Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures},
  booktitle    = {VLSI-SoC: From Systems To Silicon, Proceedings of {IFIP} {TC} 10,
                  {WG} 10.5, Thirteenth International Conference on Very Large Scale
                  Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005,
                  Perth, Australia},
  series       = {{IFIP}},
  volume       = {240},
  pages        = {25--39},
  publisher    = {Springer},
  year         = {2005},
  url          = {https://doi.org/10.1007/978-0-387-73661-7\_3},
  doi          = {10.1007/978-0-387-73661-7\_3},
  timestamp    = {Mon, 03 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsi/OliveiraSFCMMBR05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sbcci/FerraoWRG03,
  author       = {Daniel Lima Ferr{\~{a}}o and
                  Gustavo Wilke and
                  Ricardo Augusto da Luz Reis and
                  Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
  title        = {Improving Critical Path Identification in Functional Timing Analysis},
  booktitle    = {Proceedings of the 16th Annual Symposium on Integrated Circuits and
                  Systems Design, {SBCCI} 2003, Sao Paulo, Brazil, September 8-11, 2003},
  pages        = {297--302},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/SBCCI.2003.1232844},
  doi          = {10.1109/SBCCI.2003.1232844},
  timestamp    = {Mon, 03 Mar 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sbcci/FerraoWRG03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}