BibTeX records: Akira Asato

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@inproceedings{DBLP:conf/hpcasia/KodamaOAS20,
  author       = {Yuetsu Kodama and
                  Tetsuya Odajima and
                  Akira Asato and
                  Mitsuhisa Sato},
  title        = {Accuracy Improvement of Memory System Simulation for Modern Shared
                  Memory Processor},
  booktitle    = {Proceedings of the International Conference on High Performance Computing
                  in Asia-Pacific Region, {HPC} Asia 2020, Fukuoka, Japan, January 15-17,
                  2020},
  pages        = {142--149},
  publisher    = {{ACM}},
  year         = {2020},
  url          = {https://doi.org/10.1145/3368474.3368483},
  doi          = {10.1145/3368474.3368483},
  timestamp    = {Sun, 19 Jan 2025 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpcasia/KodamaOAS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sc/SatoITKOTYASMHF20,
  author       = {Mitsuhisa Sato and
                  Yutaka Ishikawa and
                  Hirofumi Tomita and
                  Yuetsu Kodama and
                  Tetsuya Odajima and
                  Miwako Tsuji and
                  Hisashi Yashiro and
                  Masaki Aoki and
                  Naoyuki Shida and
                  Ikuo Miyoshi and
                  Kouichi Hirai and
                  Atsushi Furuya and
                  Akira Asato and
                  Kuniki Morita and
                  Toshiyuki Shimizu},
  editor       = {Christine Cuicchi and
                  Irene Qualters and
                  William T. Kramer},
  title        = {Co-design for {A64FX} manycore processor and "Fugaku"},
  booktitle    = {Proceedings of the International Conference for High Performance Computing,
                  Networking, Storage and Analysis, {SC} 2020, Virtual Event / Atlanta,
                  Georgia, USA, November 9-19, 2020},
  pages        = {47},
  publisher    = {{IEEE/ACM}},
  year         = {2020},
  url          = {https://doi.org/10.1109/SC41405.2020.00051},
  doi          = {10.1109/SC41405.2020.00051},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/sc/SatoITKOTYASMHF20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1904-06451,
  author       = {Yuetsu Kodama and
                  Tetsuya Odajima and
                  Akira Asato and
                  Mitsuhisa Sato},
  title        = {Evaluation of the {RIKEN} Post-K Processor Simulator},
  journal      = {CoRR},
  volume       = {abs/1904.06451},
  year         = {2019},
  url          = {http://arxiv.org/abs/1904.06451},
  eprinttype    = {arXiv},
  eprint       = {1904.06451},
  timestamp    = {Thu, 25 Apr 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1904-06451.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/imt/AndoAKOW06,
  author       = {Hisashige Ando and
                  Akira Asato and
                  Motoyuki Kawaba and
                  Hideki Okawara and
                  William W. Walker},
  title        = {A Case Study: Energy Efficient High Throughput Chip Multi-Processor
                  Using Reduced-complexity Cores for Transaction Processing Workload},
  journal      = {Inf. Media Technol.},
  volume       = {1},
  number       = {1},
  pages        = {80--91},
  year         = {2006},
  url          = {https://doi.org/10.11185/imt.1.80},
  doi          = {10.11185/IMT.1.80},
  timestamp    = {Mon, 26 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/imt/AndoAKOW06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/eScience/ShigetaIUKMYKAK06,
  author       = {Soichi Shigeta and
                  Nobutaka Imamura and
                  Haruyasu Ueda and
                  Hiromichi Kobashi and
                  Miho Murata and
                  Taketoshi Yoshida and
                  Atsushi Kubota and
                  Akira Asato and
                  Yoshimasa Kadooka},
  title        = {Grid Service Platform: Design and Implementation of Grid Middleware
                  for Telecom Carriers},
  booktitle    = {Second International Conference on e-Science and Grid Technologies
                  (e-Science 2006), 4-6 December 2006, Amsterdam, The Netherlands},
  pages        = {110},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/E-SCIENCE.2006.261194},
  doi          = {10.1109/E-SCIENCE.2006.261194},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/eScience/ShigetaIUKMYKAK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/KubosawaHATAASS99,
  author       = {Hajime Kubosawa and
                  Naoshi Higaki and
                  Satoshi Ando and
                  Hiromasa Takahashi and
                  Yoshimi Asada and
                  Hideaki Anbutsu and
                  Tomio Sato and
                  Masato Sakate and
                  Atsuhiro Suga and
                  Michihide Kimura and
                  Hideo Miyake and
                  Hiroshi Okano and
                  Akira Asato and
                  Yasunori Kimura and
                  Hiroshi Nakayama and
                  Masayoshi Kimoto and
                  Katsuji Hirochi and
                  Hideki Saito and
                  Norio Kaido and
                  Yukihiro Nakagawa and
                  Toshio Shimada},
  title        = {A 2.5-GFLOPS, 6.5 million polygons per second, four-way {VLIW} geometry
                  processor with {SIMD} instructions and a software bypass mechanism},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {34},
  number       = {11},
  pages        = {1619--1626},
  year         = {1999},
  url          = {https://doi.org/10.1109/4.799871},
  doi          = {10.1109/4.799871},
  timestamp    = {Thu, 07 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KubosawaHATAASS99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/KubosawaTAAASKH98,
  author       = {Hajime Kubosawa and
                  Hiromasa Takahashi and
                  Satoshi Ando and
                  Yoshimi Asada and
                  Akira Asato and
                  Atsuhiro Suga and
                  Michihide Kimura and
                  Naoshi Higaki and
                  Hideo Miyake and
                  Tomio Sato and
                  Hideaki Anbutsu and
                  Toshitaka Tsuda and
                  Tetsuo Yoshimura and
                  Isao Amano and
                  Mutsuaki Kai and
                  Shin Mitarai},
  title        = {A 1.2-W, 2.16-GOPS/720-MFLOPS embedded superscalar microprocessor
                  for multimedia applications},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {33},
  number       = {11},
  pages        = {1640--1648},
  year         = {1998},
  url          = {https://doi.org/10.1109/4.726550},
  doi          = {10.1109/4.726550},
  timestamp    = {Tue, 05 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KubosawaTAAASKH98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fgcs/KumonAASHHH92,
  author       = {Kouichi Kumon and
                  Akira Asato and
                  Susumu Arai and
                  Tsuyoshi Shinogi and
                  Akira Hattori and
                  Hiroyoshi Hatazawa and
                  Kiyoshi Hirano},
  title        = {Architecture and Implementation of PIM/p},
  booktitle    = {Proceedings of the International Conference on Fifth Generation Computer
                  Systems. {FGCS} 1992, June 1-5, Tokyo, Japan},
  pages        = {414--424},
  publisher    = {{IOS} Press},
  year         = {1992},
  timestamp    = {Wed, 31 Jul 2019 10:45:39 +0200},
  biburl       = {https://dblp.org/rec/conf/fgcs/KumonAASHHH92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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