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ORCIDArash Ardakani
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2020 – today
- 2024
[c19]Arash Ardakani, Minwoo Kang, Kevin He, Vighnesh M. Iyer, Suhong Moon, John Wawrzynek:
Late Breaking Results: Differential and Massively Parallel Sampling of SAT Formulas. DAC 2024: 356:1-356:2- [c18]Arash Ardakani, Altan Haan, Shangyin Tan, Doru-Thom Popovici, Alvin Cheung, Costin Iancu, Koushik Sen:
SlimFit: Memory-Efficient Fine-Tuning of Transformer-based Models Using Training Dynamics. NAACL-HLT 2024: 6218-6236 - 2023
- [i8]Arash Ardakani, Altan Haan, Shangyin Tan, Doru-Thom Popovici, Alvin Cheung
, Costin Iancu, Koushik Sen:
SlimFit: Memory-Efficient Fine-Tuning of Transformer-based Models Using Training Dynamics. CoRR abs/2305.18513 (2023) - 2022
- [c17]Arash Ardakani:
Partially-Random Initialization: A Smoking Gun for Binarization Hypothesis of BERT. EMNLP (Findings) 2022: 2603-2612 - [i7]Amir Ardakani, Arash Ardakani, Brett H. Meyer, James J. Clark, Warren J. Gross:
Standard Deviation-Based Quantization for Deep Neural Networks. CoRR abs/2202.12422 (2022) - 2021
- [j7]Amir Ardakani, Arash Ardakani, Warren J. Gross:
Training Binarized Neural Networks Using Ternary Multipliers. IEEE Des. Test 38(6): 44-52 (2021) - [j6]Warren J. Gross, Brett H. Meyer, Arash Ardakani:
Hardware-Aware Design for Edge Intelligence. IEEE Open J. Circuits Syst. 2: 113-127 (2021) - [c16]Amir Ardakani, Arash Ardakani, Warren J. Gross:
Fault-Tolerance of Binarized and Stochastic Computing-based Neural Networks. SiPS 2021: 52-57 - 2020
- [j5]Arash Ardakani, Carlo Condo, Warren J. Gross:
Fast and Efficient Convolutional Accelerator for Edge Computing. IEEE Trans. Computers 69(1): 138-152 (2020) - [c15]Arash Ardakani, Amir Ardakani, Warren J. Gross:
A Regression-Based Method to Synthesize Complex Arithmetic Computations on Stochastic Streams. ISCAS 2020: 1-5 - [c14]Arash Ardakani, Amir Ardakani, Warren J. Gross:
Training Linear Finite-State Machines. NeurIPS 2020
2010 – 2019
- 2019
- [j4]Carlo Condo, Seyyed Ali Hashemi, Arash Ardakani, Furkan Ercan, Warren J. Gross:
Design and Implementation of a Polar Codes Blind Detection Scheme. IEEE Trans. Circuits Syst. II Express Briefs 66-II(6): 943-947 (2019) - [c13]Arash Ardakani, Zhengyun Ji, Warren J. Gross:
Learning to Skip Ineffectual Recurrent Computations in LSTMs. DATE 2019: 1427-1432 - [c12]Arash Ardakani, Zhengyun Ji, Sean C. Smithson, Brett H. Meyer, Warren J. Gross:
Learning Recurrent Binary/Ternary Weights. ICLR (Poster) 2019 - [c11]Arash Ardakani, Zhengyun Ji, Amir Ardakani, Warren J. Gross:
The Synthesis of XNOR Recurrent Neural Networks with Stochastic Logic. NeurIPS 2019: 8442-8452 - 2018
- [j3]Arash Ardakani, Carlo Condo, Mehdi Ahmadi, Warren J. Gross:
An Architecture to Accelerate Convolution in Deep Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1349-1362 (2018) - [c10]Arash Ardakani, Carlo Condo, Warren J. Gross:
A Convolutional Accelerator for Neural Networks With Binary Weights. ISCAS 2018: 1-5 - [c9]Arash Ardakani, Carlo Condo, Warren J. Gross:
A Multi-Mode Accelerator for Pruned Deep Neural Networks. NEWCAS 2018: 352-355 - [i6]Carlo Condo, Seyyed Ali Hashemi, Arash Ardakani, Furkan Ercan, Warren J. Gross:
Design and Implementation of a Polar Codes Blind Detection Scheme. CoRR abs/1801.01820 (2018) - [i5]Arash Ardakani, Zhengyun Ji, Sean C. Smithson, Brett H. Meyer, Warren J. Gross:
Learning Recurrent Binary/Ternary Weights. CoRR abs/1809.11086 (2018) - [i4]Arash Ardakani, Zhengyun Ji, Warren J. Gross:
Learning to Skip Ineffectual Recurrent Computations in LSTMs. CoRR abs/1811.10396 (2018) - 2017
- [j2]Arash Ardakani, François Leduc-Primeau, Naoya Onizawa, Takahiro Hanyu, Warren J. Gross:
VLSI Implementation of Deep Neural Network Using Integral Stochastic Computing. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2688-2699 (2017) - [c8]Arash Ardakani, Carlo Condo, Warren J. Gross:
Activation pruning of deep convolutional neural networks. GlobalSIP 2017: 1325-1329 - [c7]Arash Ardakani, Carlo Condo, Warren J. Gross:
Sparsely-Connected Neural Networks: Towards Efficient VLSI Implementation of Deep Neural Networks. ICLR (Poster) 2017 - [c6]Arash Ardakani, Mahdi Shabany:
A low-complexity fully scalable interleaver/address generator based on a novel property of QPP interleavers. ISCAS 2017: 1-4 - [i3]Arash Ardakani, Carlo Condo, Warren J. Gross:
Multi-Mode Inference Engine for Convolutional Neural Networks. CoRR abs/1712.03994 (2017) - 2016
- [c5]Arash Ardakani, François Leduc-Primeau, Warren J. Gross:
Hardware implementation of FIR/IIR digital filters using integral stochastic computation. ICASSP 2016: 6540-6544 - [c4]Arash Ardakani, François Leduc-Primeau, Naoya Onizawa, Takahiro Hanyu, Warren J. Gross:
VLSI implementation of deep neural networks using integral stochastic computing. ISTC 2016: 216-220 - [c3]Sean C. Smithson, Kaushik Boga, Arash Ardakani, Brett H. Meyer, Warren J. Gross:
Stochastic Computing Can Improve Upon Digital Spiking Neural Networks. SiPS 2016: 309-314 - [i2]Arash Ardakani, Carlo Condo, Warren J. Gross:
Sparsely-Connected Neural Networks: Towards Efficient VLSI Implementation of Deep Neural Networks. CoRR abs/1611.01427 (2016) - 2015
- [j1]Arash Ardakani, Mahdi Shabany:
A Novel Area-Efficient VLSI Architecture for Recursion Computation in LTE Turbo Decoders. IEEE Trans. Circuits Syst. II Express Briefs 62-II(6): 568-572 (2015) - [c2]Arash Ardakani, Mahdi Shabany:
An efficient max-log MAP algorithm for VLSI implementation of turbo decoders. ISCAS 2015: 1794-1797 - [i1]Arash Ardakani, François Leduc-Primeau, Naoya Onizawa, Takahiro Hanyu, Warren J. Gross:
VLSI Implementation of Deep Neural Network Using Integral Stochastic Computing. CoRR abs/1509.08972 (2015) - 2013
- [c1]Arash Ardakani, Mojtaba Mahdavi, Mahdi Shabany:
An efficient VLSI architecture of QPP interleaver/deinterleaver for LTE turbo coding. ISCAS 2013: 797-800
Coauthor Index
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