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2020 – today
- 2024
[j5]Paresh Baidya
, Swagata Mandal, Rourab Paul:
Near Threshold Computation of Partitioned Ring Learning With Error (RLWE) Hardware Accelerator on Reconfigurable Architecture. IEEE Access 12: 68814-68827 (2024)- 2022
- [i6]Paresh Baidya, Swagata Mandal, Rourab Paul:
Near Threshold Computation of Partitioned Ring Learning With Error (RLWE) Post Quantum Cryptography on Reconfigurable Architecture. CoRR abs/2208.08093 (2022) - 2021
- [j4]Swagata Mandal, Amlan Chakrabarti, Srinivasu Bodapati:
Clustered Error Resilient SRAM-Based Reconfigurable Computing Platform. IEEE Trans. Aerosp. Electron. Syst. 57(3): 1768-1779 (2021)
2010 – 2019
- 2019
- [c8]Karthikeyan Nagarajan, Sina Sayyah Ensan, Swagata Mandal, Swaroop Ghosh, Anupam Chattopadhyay:
iMACE: In-Memory Acceleration of Classic McEliece Encoder. ISVLSI 2019: 513-518 - [c7]Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti:
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM Based FPGA. VLSID 2019: 257-262 - 2018
- [c6]Anubhab Baksi, Vikramkumar Pudi, Swagata Mandal, Anupam Chattopadhyay:
Lightweight ASIC Implementation of AEGIS-128. ISVLSI 2018: 251-256 - [c5]Swagata Mandal, Debjyoti Bhattacharjee, Yaswanth Tavva, Anupam Chattopadhyay:
ReRAM-based In-Memory Computation of Galois Field arithmetic. VLSI-SoC 2018: 1-6 - [c4]Swagata Mandal, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay:
ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code. VLSI-SoC (Selected Papers) 2018: 128-146 - [i5]Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti:
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM based FPGA. CoRR abs/1810.09661 (2018) - 2017
- [j3]Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay:
Efficient dynamic priority based soft error mitigation techniques for configuration memory of FPGA hardware. Microprocess. Microsystems 51: 313-330 (2017) - 2016
- [j2]Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay:
A Novel Method for Soft Error Mitigation in FPGA Using Modified Matrix Code. IEEE Embed. Syst. Lett. 8(4): 65-68 (2016) - 2015
- [j1]Tamaghna Acharya, Santi P. Maity, Swagata Mandal:
Outage Minimized Joint Power and Channel Allocation in Multihop Cognitive Radio Networks: A Lifetime-Centric Approach. Wirel. Pers. Commun. 83(4): 2519-2537 (2015) - [c3]Swagata Mandal, Suman Sau, Amlan Chakrabarti, Sushanta Kumar Pal, Subhasish Chattopadhyay:
FPGA Implementation of High Speed Latency Optimized Optical Communication System Based on Orthogonal Concatenated Code. ATS 2015: 169-174 - [c2]Swagata Mandal, Suman Sau, Amlan Chakrabarti, Jogendra Saini, Sushanta Kumar Pal, Subhasish Chattopadhyay:
FPGA Based Novel High Speed DAQ System Design with Error Correction. ISVLSI 2015: 80-85 - [i4]Swagata Mandal, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay:
FPGA based High Speed Data Acquisition System for High Energy Physics Application. CoRR abs/1503.08819 (2015) - [i3]Suman Sau, Swagata Mandal, Jogender Saini, Amlan Chakrabarti, Subhasis Chattopadhyay:
High speed fault tolerant secure communication for muon chamber using fpga based gbt emulator. CoRR abs/1505.04569 (2015) - [i2]Swagata Mandal, Suman Sau, Amlan Chakrabarti, Jogendra Saini, Sushanta Kumar Pal, Subhasish Chattopadhyay:
FPGA based Novel High Speed DAQ System Design with Error Correction. CoRR abs/1507.01777 (2015) - [i1]Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay:
A Novel Method for Soft Error Mitigation in FPGA using Adaptive Cross Parity Code. CoRR abs/1509.06891 (2015) - 2013
- [c1]Tamaghna Acharya, Swagata Mandal, Santi P. Maity:
Joint power and channel allocation for outage probability minimization in cognitive radio ad hoc networks. COMSNETS 2013: 1-7
Coauthor Index
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