Cryogenic Circuit Performance Prediction Using Design-Oriented Model (SEKV) On 22nm FDSOI. - Martinez, Brian; Han, Hung-Chi; Bergamaschi, Flávio Enrico; Schmidt, Quentin; Faurie, Antoine; Charbon, Edoardo; Thonnart, Yvain; Jadot, Baptiste; Jehl, Xavier; Cassé, Mikaël; Enz, Christian C.; Badets, Franck (2025)

13.5 An 18.5µW/qubit Cryo-CMOS Charge-Readout IC Demonstrating QAM Multiplexing for Spin Qubits. - Schmidt, Quentin; Jadot, Baptiste; Martinez, Brian; Faurie, Antoine; Meunier, Tristan; Casanova, Jean-Baptiste; Jehl, Xavier; Thonnart, Yvain; Badets, Franck (2025)

Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro. - Giraud, Bastien; Ricavy, Sebastien; Laffond, Cyrille; Sever, Ilan; Gherman, Valentin; Lepin, Florent; Diallo, Mariam; Zenati, Khadija; Dumas, Sylvain; Guille, Olivier; Vershkov, Maxim; Bricalli, Alessandro; et al. (IEEE J. Solid State Circuits, 2024)

A 7.4μW and 860μm2per Channel Cryo-CMOS IC for 70-Channel Frequency-Multiplexed μs-Readout of Semiconductor Qubits. - Schmidt, Quentin; Martinez, Brian; Houriez, Thomas; Jadot, Baptiste; Jansen, Aloysius G. M.; Jehl, Xavier; Meunier, Tristan; Pillonnet, Gaël; Billiot, Gérard; Morel, Adrien; Thonnart, Yvain; Badets, Franck (2024)

SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. - Miro-Panades, Ivan; Tain, Benoît; Christmann, Jean-Frédéric; Coriat, David; Lemaire, Romain; Jany, Clement; Martineau, Baudouin; Chaix, Fabrice; Waltener, Guillaume; Pluchart, Emmanuel; Noel, Jean-Philippe; Makosiej, Adam; et al. (IEEE J. Solid State Circuits, 2023)

A Cryogenic Active Router for Qubit Array Biasing from DC to 320 MHz at 100 nm Gate Pitch. - Jadot, Baptiste; Zurita, Marcos; Billiot, Gérard; Thonnart, Yvain; Guevel, Loïck Le; Darnas, Mathieu; Thomas, Candice; Charbonnier, Jean; Meunier, Tristan; Vinet, Maud; Badets, Franck; Pillonnet, Gaël (2023)

Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro. - Giraud, Bastien; Ricavy, Sebastien; Moursy, Yasser; Laffond, Cyrille; Sever, Ilan; Gherman, Valentin; Pezzin, Manuel; Lepin, Florent; Diallo, Mariam; Zenati, Khadija; Dumas, Sylvain; Vershkov, Maxim; et al. (2023)

SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. - Miro-Panades, Ivan; Tain, Benoît; Christmann, Jean-Frédéric; Coriat, David; Lemaire, Romain; Jany, Clement; Martineau, Baudouin; Chaix, Fabrice; Waltener, Guillaume; Pluchart, Emmanuel; Noel, Jean-Philippe; Makosiej, Adam; et al. (CoRR, 2023)

Architecting Optically Controlled Phase Change Memory. - Narayan, Aditya; Thonnart, Yvain; Vivet, Pascal; Coskun, Ayse K.; Joshi, Ajay (ACM Trans. Archit. Code Optim., 2022)

IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. - Vivet, Pascal; Guthmuller, Eric; Thonnart, Yvain; Pillonnet, Gaël; Tortolero, César Fuguet; Miro-Panades, Ivan; Moritz, Guillaume; Durupt, Jean; Bernard, Christian; Varreau, Didier; Pontes, Julian J. H.; Thuries, Sébastien; et al. (IEEE J. Solid State Circuits, 2021)

PROWAVES: Proactive Runtime Wavelength Selection for Energy-Efficient Photonic NoCs. - Narayan, Aditya; Thonnart, Yvain; Vivet, Pascal; Coskun, Ayse K. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

SE2: Going Remote: Challenges and Opportunities to Remote Learning, Work, and Collaboration. - Klinefelter, Alicia; Liu, Huichu; Benini, Luca; Thonnart, Yvain; Bowman, Keith A.; Wilcox, Kathy; Bol, David; Loke, Alvin; Shacham, Ofer (2021)

Designing a Multi-Chiplet Manycore System using the POPSTAR Optical NoC Architecture (Invited). - Thonnart, Yvain (2021)

Architecting Optically-Controlled Phase Change Memory. - Narayan, Aditya; Thonnart, Yvain; Vivet, Pascal; Coskun, Ayse K.; Joshi, Ajay (CoRR, 2021)

System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications. - Narayan, Aditya; Thonnart, Yvain; Vivet, Pascal; Joshi, Ajay; Coskun, Ayse K. (2020)

POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems. - Thonnart, Yvain; Bernabé, Stéphane; Charbonnier, Jean; Bernard, Christian; Coriat, David; Tortolero, César Fuguet; Tissier, Pierre; Charbonnier, Benoît; Malhouitre, Stéphane; Saint-Patrice, Damien; Assous, Myriam; Narayan, Aditya; et al. (2020)

2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. - Vivet, Pascal; Guthmuller, Eric; Thonnart, Yvain; Pillonnet, Gaël; Moritz, Guillaume; Miro-Panades, Ivan; Tortolero, César Fuguet; Durupt, Jean; Bernard, Christian; Varreau, Didier; Pontes, Julian J. H.; Thuries, Sébastien; et al. (2020)

19.2 A 110mK 295µW 28nm FDSOI CMOS Quantum Integrated Circuit with a 2.8GHz Excitation and nA Current Sensing of an On-Chip Double Quantum Dot. - Guevel, Loïck Le; Billiot, Gérard; Jehl, Xavier; Franceschi, Silvano De; Zurita, Marcos; Thonnart, Yvain; Vinet, Maud; Sanquer, Marc; Maurand, Romain; Jansen, Aloysius G. M.; Pillonnet, Gaël (2020)

Latency Improvement of an Industrial SoC System Interconnect using an Asynchronous NoC Backbone. - Thonnart, Yvain; Vivet, Pascal; Agarwal, Shikhanshu; Chauhan, Ramesh (2019)

WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs. - Narayan, Aditya; Thonnart, Yvain; Vivet, Pascal; Tortolero, César Fuguet; Coskun, Ayse K. (2019)

A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm2 Die-to-Die Optical Networks. - Thonnart, Yvain; Zid, Mounir; Jimenez, Jose-Luis Gonzalez; Waltener, Guillaume; Polster, Robert; Dubray, Olivier; Lepin, Florent; Bernabé, Stéphane; Menezo, Sylvie; Pares, Gabriel; Castany, Olivier; Boutafa, Laura; et al. (2018)

A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. - Vivet, Pascal; Thonnart, Yvain; Lemaire, Romain; Santos, Cristiano; Beigné, Edith; Bernard, Christian; Darve, Florian; Lattard, Didier; Panades, Ivan Miro; Dutoit, Denis; Clermidy, Fabien; Cheramy, Séverine; et al. (IEEE J. Solid State Circuits, 2017)

In-situ Fmax/Vmin tracking for energy efficiency and reliability optimization. - Panades, Ivan Miro; Beigné, Edith; Billoint, Olivier; Thonnart, Yvain (2017)

Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks. - Duong, Luan H. K.; Wang, Zhehui; Nikdast, Mahdi; Xu, Jiang; Yang, Peng; Wang, Zhifei; Wang, Zhe; Maeda, Rafael K. V.; Li, Haoran; Wang, Xuan; Beux, Sébastien Le; Thonnart, Yvain (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes. - Polster, Robert; Thonnart, Yvain; Waltener, Guillaume; Jimenez, Jose-Luis Gonzalez; Cassan, Eric (IEEE Trans. Very Large Scale Integr. Syst., 2016)

8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links. - Vivet, Pascal; Thonnart, Yvain; Lemaire, Romain; Beigné, Edith; Bernard, Christian; Darve, Florian; Lattard, Didier; Panades, Ivan Miro; Santos, Cristiano; Clermidy, Fabien; Cheramy, Séverine; Pétrot, Frédéric; et al. (2016)

10 Gbps, 560 fJ/b TIA and modulator driver for optical networks-on-chip in CMOS 65nm. - Jimenez, Jose-Luis Gonzalez; Polster, Robert; Waltener, Guillaume; Thonnart, Yvain; Cassan, Eric (2016)

A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking. - Beigné, Edith; Valentian, Alexandre; Panades, Ivan Miro; Wilson, Robin; Flatresse, Philippe; Abouzeid, Fady; Benoist, Thomas; Bernard, Christian; Bernard, Sebastien; Billoint, Olivier; Clerc, Sylvain; Giraud, Bastien; et al. (IEEE J. Solid State Circuits, 2015)

3D advanced integration technology for heterogeneous systems. - Vivet, Pascal; Bernard, Christian; Clermidy, Fabien; Dutoit, Denis; Guthmuller, Eric; Panades, Ivan Miro; Pillonnet, Gaël; Thonnart, Yvain; Garnier, Arnaud; Lattard, Didier; Jouve, Amandine; Bana, Franck; et al. (2015)

Two-phase protocol converters for 3D asynchronous 1-of-n data links. - Pontes, Julian J. H.; Vivet, Pascal; Thonnart, Yvain (2015)

Complementary communication path for energy efficient on-chip optical interconnects. - Li, Hui; Beux, Sébastien Le; Thonnart, Yvain; O'Connor, Ian (2015)

Coherent crosstalk noise analyses in ring-based optical interconnects. - Duong, Luan H. K.; Nikdast, Mahdi; Xu, Jiang; Wang, Zhehui; Thonnart, Yvain; Beux, Sébastien Le; Yang, Peng; Wu, Xiaowen; Wang, Zhifei (2015)

Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes. - Beigné, Edith; Clermidy, Fabien; Lattard, Didier; Panades, Ivan Miro; Thonnart, Yvain; Vivet, Pascal (2015)

Interconnect Challenges for 3D Multi-cores: From 3D Network-on-Chip to Cache Interconnects. - Vivet, Pascal; Bernard, Christian; Guthmuller, Eric; Panades, Ivan Miro; Thonnart, Yvain; Clermidy, Fabien (2015)

A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC. - Panades, Ivan Miro; Beigné, Edith; Thonnart, Yvain; Alacoque, Laurent; Vivet, Pascal; Lesecq, Suzanne; Puschini, Diego; Molnos, Anca; Thabet, Farhat; Tain, Benoît; Chehida, Karim Ben; Engels, Sylvain; et al. (IEEE J. Solid State Circuits, 2014)

27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking. - Wilson, Robin; Beigné, Edith; Flatresse, Philippe; Valentian, Alexandre; Abouzeid, Fady; Benoist, Thomas; Bernard, Christian; Bernard, Sebastien; Billoint, Olivier; Clerc, Sylvain; Giraud, Bastien; Grover, Anuj; et al. (2014)

Introduction to the special session on "Silicon photonic interconnects: an illusion or a realistic solution?". - Xu, Jiang; Beux, Sébastien Le; Thonnart, Yvain (2014)

Technology assessment of silicon interposers for manycore SoCs: Active, passive, or optical? - Thonnart, Yvain; Zid, Mounir (2014)

An Iterative Computational Technique for Performance Evaluation of Networks-on-Chip. - Foroutan, Sahar; Thonnart, Yvain; Pétrot, Frédéric (IEEE Trans. Computers, 2013)

Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. - Beigné, Edith; Valentian, Alexandre; Giraud, Bastien; Thomas, Olivier; Benoist, Thomas; Thonnart, Yvain; Bernard, Serge; Moritz, Guillaume; Billoint, Olivier; Maneglia, Y.; Flatresse, Philippe; Noel, Jean-Philippe; et al. (2013)

A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC. - Beigné, Edith; Miro-Panades, Ivan; Thonnart, Yvain; Alacoque, Laurent; Vivet, Pascal; Lesecq, Suzanne; Puschini, Diego; Thabet, Farhat; Tain, Benoît; Benchehida, K.; Engels, Sylvain; Wilson, Robin; et al. (2013)

Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology. - Pelloux-Prayer, Bertrand; Valentian, Alexandre; Giraud, Bastien; Thonnart, Yvain; Noel, Jean-Philippe; Flatresse, Philippe; Beigné, Edith (2013)

A Pseudo-Synchronous Implementation Flow for WCHB QDI Asynchronous Circuits. - Thonnart, Yvain; Beigné, Edith; Vivet, Pascal (2012)

3D NoC using through silicon Via: An asynchronous implementation. - Vivet, Pascal; Dutoit, Denis; Thonnart, Yvain; Clermidy, Fabien (2011)

A fully-asynchronous low-power framework for GALS NoC integration. - Thonnart, Yvain; Vivet, Pascal; Clermidy, Fabien (2010)

An analytical method for evaluating Network-on-Chip performance. - Foroutan, Sahar; Thonnart, Yvain; Hersemeule, Richard; Jerraya, Ahmed (2010)

A Markov chain based method for NoC end-to-end latency evaluation. - Foroutan, Sahar; Thonnart, Yvain; Hersemeule, Richard; Jerraya, Ahmed (2010)

A 477mW NoC-based digital baseband for MIMO 4G SDR. - Clermidy, Fabien; Bernard, Christian; Lemaire, Romain; Martin, Jérôme; Panades, Ivan Miro; Thonnart, Yvain; Vivet, Pascal; Wehn, Norbert (2010)

Distributed Sequencing for Resource Sharing in Multi-applicative Heterogeneous NoC Platforms. - Thonnart, Yvain; Lemaire, Romain; Clermidy, Fabien (2010)

Design-for-test approach of an asynchronous network-on-chip architecture and its associated test pattern generation and application. - Tran, Xuan-Tu; Thonnart, Yvain; Durupt, Jean; Beroulle, Vincent; Robach, Chantal (IET Comput. Digit. Tech., 2009)

An Asynchronous Power Aware and Adaptive NoC Based Circuit. - Beigné, Edith; Clermidy, Fabien; Lhermet, Hélène; Miermont, Sylvain; Thonnart, Yvain; Tran, Xuan-Tu; Valentian, Alexandre; Varreau, Didier; Vivet, Pascal; Popon, Xavier; Lebreton, Hugo (IEEE J. Solid State Circuits, 2009)

Power Reduction of Asynchronous Logic Circuits Using Activity Detection. - Thonnart, Yvain; Beigné, Edith; Valentian, Alexandre; Vivet, Pascal (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Design and Implementation of a GALS Adapter for ANoC Based Architectures. - Thonnart, Yvain; Beigné, Edith; Vivet, Pascal (2009)

An Open and Reconfigurable Platform for 4G Telecommunication: Concepts and Application. - Clermidy, Fabien; Lemaire, Romain; Popon, Xavier; Ktenas, Dimitri; Thonnart, Yvain (2009)

A Communication and configuration controller for NoC based reconfigurable data flow architecture. - Clermidy, Fabien; Lemaire, Romain; Thonnart, Yvain; Vivet, Pascal (2009)

Automatic Power Regulation Based on an Asynchronous Activity Detection and its Application to ANOC Node Leakage Reduction. - Thonnart, Yvain; Beigné, Edith; Valentian, Alexandre; Vivet, Pascal (2008)

Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures. - Coste, Nicolas; Garavel, Hubert; Hermanns, Holger; Hersemeule, Richard; Thonnart, Yvain; Zidouni, Meriem (2008)

A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application. - Tran, Xuan-Tu; Thonnart, Yvain; Durupt, Jean; Beroulle, Vincent; Robach, Chantal (2008)

Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip. - Salaün, Gwen; Serwe, Wendelin; Thonnart, Yvain; Vivet, Pascal (2007)

Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip. - Tran, Xuan-Tu; Durupt, Jean; Thonnart, Yvain; Bertrand, François; Beroulle, Vincent; Robach, Chantal (2007)

ASC, a SystemC Extension for Modeling Asynchronous Systems, and Its Application to an Asynchronous NoC. - Koch-Hofer, Cedric; Renaudin, Marc; Thonnart, Yvain; Vivet, Pascal (2007)