Woogeun Rhee

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Michael P. Beakes

> Home > Persons > Woogeun Rhee

Publications

2006
[j6]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/BulzacchelliMRR06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/BulzacchelliMRR06
John F. Bulzacchelli, Mounir Meghelli, Sergey V. Rylov, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, Lei Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman:
A 10-Gb/s 5-Tap DFE/4-Tap FFE Transceiver in 90-nm CMOS Technology. IEEE J. Solid State Circuits 41(12): 2885-2900 (2006)
[c4]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/MeghelliRBRRAPB06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/MeghelliRBRRAPB06
Mounir Meghelli, Sergey V. Rylov, John F. Bulzacchelli, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, L. Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman:
A 10Gb/s 5-Tap-DFE/4-Tap-FFE Transceiver in 90nm CMOS. ISSCC 2006: 213-222
2005
[j5]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/BeukemaSSZJMMRA05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/BeukemaSSZJMMRA05
Troy J. Beukema, Michael Sorna, Karl Selander, Steven Zier, Brian L. Ji, Phil Murfet, James Mason, Woogeun Rhee, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes:
A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization. IEEE J. Solid State Circuits 40(12): 2633-2645 (2005)
2003
[c3]
- view
  authority control:
- export record
  dblp key:
  - conf/cicc/RheeARRBFGS03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/cicc/RheeARRBFGS03
Woogeun Rhee, Herschel A. Ainspan, Sergey V. Rylov, Alexander V. Rylyakov, Michael P. Beakes, Daniel J. Friedman, Sudhir M. Gowda, Mehmet Soyuer:
A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop. CICC 2003: 81-84

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.