"A 6- μ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS ..."

Jianping Guo, Ka Nang Leung (2010)

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DOI: 10.1109/JSSC.2010.2053859

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type: Journal Article

metadata version: 2020-08-30

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Jianping Guo, Ka Nang Leung:
A 6- μ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology. IEEE J. Solid State Circuits 45(9): 1896-1905 (2010)

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