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ORCIDYngvar Berg
Person information
- affiliation: University of Oslo, Norway
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2020 – today
- 2024
[c108]Omid Mirmotahari, Anders I. Mørch, Yngvar Berg:
Evolution of Technological Innovations, User Experiences, and Literacies. CoPDA@AVI 2024
2010 – 2019
- 2019
- [c107]Omid Mirmotahari
, Yngvar Berg, Ester Fremstad, Crina Damsa:
Student Engagement by Employing Student Peer Reviews with Criteria-Based Assessment. EDUCON 2019: 1152-1157 - [c106]Omid Mirmotahari, Yngvar Berg, Stein Gjessing, Ester Fremstad, Crina Damsa:
A Case-Study of Automated Feedback Assessment. EDUCON 2019: 1190-1197 - [c105]Omid Mirmotahari, Gunnar Rye Bergersen, Yngvar Berg, Kristin Bråthen, Kristin Broch Eliassen:
Framework for Pupil-to-Student Transition, Learning Environment and Semester Start for First-Year Students. I3E Workshops 2019: 128-139 - [c104]Mehdi Azadmehr, Igor Paprotny, Yngvar Berg:
Q-Loading of Colpitts-Based Mass-Sensing Oscillators in Resonator-based MEMS Airborne Particulate Matter (PM) Sensors. ICCE 2019: 1-4 - [c103]Ali Dadashi, Yngvar Berg, Omid Mirmotahari:
A 4.5 fJ/conversion-step 10-bit 0.6V Asynchronous SAR ADC for Battery-free Miniature Sensor Nodes in 65nm CMOS. MIXDES 2019: 129-132 - 2018
- [j5]Francesco Dell'Anna, Tao Dong, Ping Li, Yumei Wen, Mehdi Azadmehr, Mario R. Casu, Yngvar Berg:
Lower-Order Compensation Chain Threshold-Reduction Technique for Multi-Stage Voltage Multipliers. Sensors 18(4): 1245 (2018) - [c102]Omid Mirmotahari, Yngvar Berg:
Structured peer review using a custom assessment program for electrical engineering students. EDUCON 2018: 999-1006 - [c101]Omid Mirmotahari, Crina Damsa, Yngvar Berg:
Formative feedback for learning. Case studies of automated feedback in undergraduate computer science education. ICLS 2018 - [c100]Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
A bidirectional front-end for ultrasonic pulse-echo measurements. ICNSC 2018: 1-6 - [c99]Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
A Low Power, High Gain Semi-Floating Gate Amplifier for Resonating Sensors Front-End. ISVLSI 2018: 458-463 - [c98]Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
A Discrete Implementation of a Semi-Floating Gate Amplifier for Resonating Sensor Front-End. MIXDES 2018: 97-102 - [c97]Omid Mirmotahari, Yngvar Berg, Dag Langmyhr, Ester Fremstad, Crina Damsa:
Studentaktivisering gjennom bruk av hverandrevurdering for førstesemesters studenter i Canvas LMS: en forsøksstudie. NIK 2018 - [c96]Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
A Self-Actuated Front-End for Resonating Sensors. TENCON 2018: 559-564 - [c95]Mehdi Azadmehr, Aaron Schreyer-Miller, Igor Paprotny, Yngvar Berg:
A New Differential Oscillator with T-type Feedback. UEMCON 2018: 779-782 - 2017
- [j4]Omid Mirmotahari, Yngvar Berg:
High-Speed Digital Domino Logic for Ultra-Low Supply Voltages. Circuits Syst. Signal Process. 36(12): 4774-4788 (2017) - [c94]Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
An autozeroing inverter based front-end for resonating sensors. DTIS 2017: 1-5 - [c93]Luca Marchetti, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr:
A control system for a low power bidirectional front-end for resonating sensors. ICNSC 2017: 322-326 - [c92]Mehdi Azadmehr, Luca Marchetti, Moataz S. El-Kharashi, Yngvar Berg:
A virtual Wheatstone bridge front-end for resistive sensors. ICNSC 2017: 368-371 - [c91]Mehdi Azadmehr, Luca Marchetti, Yngvar Berg:
A low power analog voltage similarity circuit. ISCAS 2017: 1-4 - [c90]Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
A bidirectional front-end with bandwidth control for actuation and read-out of MEMS resonating sensors. MIXDES 2017: 185-188 - [c89]Omid Mirmotahari, Yngvar Berg:
Erfaringer fra strukturert peer review ved bruk av et egetutviklet sensureringsprogram. NIK 2017 - 2016
- [c88]Luca Marchetti, Amar Romi, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr:
A discrete implementation of a bidirectional circuit for actuation and read-out of resonating sensors. DTIS 2016: 1-5 - [c87]Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg:
High-speed dynamic dual-rail ultra low voltage static CMOS logic operating at 300 mV. DTIS 2016: 1-4 - [c86]Luca Marchetti, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr:
Bidirectional front-end for piezoelectric resonator. ICNSC 2016: 1-4 - 2015
- [c85]Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg:
Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV. ICECS 2015: 53-56 - [c84]Yngvar Berg, Omid Mirmotahari:
Low-voltage and high-speed CMOS circuit design with low-power mode. ICECS 2015: 57-60 - [c83]Ali Dadashi, Omid Mirmotahari, Yngvar Berg:
An ultra-low-voltage, semi-floating-gate, domino, dual-rail, NOR gate. ICECS 2015: 61-64 - [c82]Mehdi Azadmehr, Belal K. Khajeh, Yngvar Berg:
A new self-sensing approach for actuation and readout of piezoelectric resonating sensor. ICNSC 2015: 232-235 - [c81]Ali Dadashi, Yngvar Berg, Omid Mirmotahari:
High-Speed, Modified, Bulk stimulated, Ultra-Low-Voltage, Domino Inverter. ISVLSI 2015: 86-90 - [c80]Yngvar Berg, Omid Mirmotahari:
Flexible Ultra-Low-Voltage CMOS Circuit Design Applicable for Digital and Analog Circuits Operating below 300mV. ISVLSI 2015: 646-651 - 2014
- [c79]Mehdi Azadmehr, Belal K. Khajeh, Yngvar Berg:
An ultra-low voltage tunable dual-Band Pass Filter. SSD 2014: 1-5 - 2011
- [c78]Yngvar Berg:
Ultra Low-Voltage and High-Speed CMOS Full Adder Using Floating-Gates and Multiple-Valued Logic. ISMVL 2011: 259-262 - 2010
- [c77]Yngvar Berg:
Ultra low-voltage bidirectional current mirror using clocked semi-floating-gate transistors. DDECS 2010: 93-98 - [c76]Yngvar Berg, Mehdi Azadmehr:
Reconfigurable pseudo floating-gate analog circuits. ICECS 2010: 211-214 - [c75]Yngvar Berg:
Novel high speed and ultra low voltage CMOS flip-flops. ICECS 2010: 293-296 - [c74]Yngvar Berg:
Novel ultra low voltage transconductance amplifier. ISCAS 2010: 1244-1247 - [c73]Yngvar Berg:
Ultra low voltage static carry generate circuit. ISCAS 2010: 1476-1479 - [c72]Yngvar Berg:
Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters. ISMVL 2010: 79-82 - [c71]Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Yngvar Berg, Tuan Vu Cao:
New SRAM design using body bias technique for ultra low power applications. ISQED 2010: 468-471 - [c70]Yngvar Berg:
Ultra low voltage and high speed CMOS flip-flop using floating-gates. VLSI-SoC 2010: 111-114 - [c69]Yngvar Berg:
Static ultra-low-voltage high-speed CMOS logic and latches. VLSI-SoC 2010: 115-118 - [c68]Yngvar Berg:
Novel ultra low-voltage and high speed domino CMOS logic. VLSI-SoC 2010: 225-228
2000 – 2009
- 2009
- [c67]Yngvar Berg, Omid Mirmotahari:
Low voltage precharge CMOS logic. DDECS 2009: 140-143 - [c66]Yngvar Berg, Omid Mirmotahari:
Ultra low-voltage switched current mirror. DDECS 2009: 242-245 - [c65]Yngvar Berg, Omid Mirmotahari:
Ultra low voltage and high speed CMOS carry generate circuits. ECCTD 2009: 69-72 - [c64]Yngvar Berg, Omid Mirmotahari:
Clocked semi-floating-gate pseudo differential pair for low-voltage analog design. ECCTD 2009: 441-444 - [c63]Yngvar Berg, Omid Mirmotahari:
Clocked semi-floating-gate ultra low-voltage current multiplier. ECCTD 2009: 445-448 - [c62]Yngvar Berg:
Novel high speed and ultra low voltage CMOS flip-flop. ICECS 2009: 65-68 - [c61]Yngvar Berg:
Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters. ICECS 2009: 144-147 - [c60]Yngvar Berg, Omid Mirmotahari:
Clocked semi-floating-gate ultra low-voltage inverting current mirror. SoCC 2009: 307-310 - [c59]Yngvar Berg, Omid Mirmotahari:
Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror. SoCC 2009: 315-318 - 2008
- [j3]Snorre Aunet, Bengt Oelmann, Per Andreas Norseng, Yngvar Berg:
Real-Time Reconfigurable Subthreshold CMOS Perceptron. IEEE Trans. Neural Networks 19(4): 645-657 (2008) - [c58]Omid Mirmotahari, Yngvar Berg:
Proposal for a Bidirectional Gate Using Pseudo Floating-Gate. DELTA 2008: 196-200 - [c57]Omid Mirmotahari, Yngvar Berg:
Low Voltage Design against Power Analysis Attacks. DELTA 2008: 545-548 - [c56]Yngvar Berg, Omid Mirmotahari, Snorre Aunet:
High speed and ultra low voltage CMOS latch. ICECS 2008: 153-156 - [c55]Mehdi Azadmehr, Yngvar Berg, Omid Mirmotahari:
Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integrator. ICECS 2008: 275-278 - [c54]Yngvar Berg, Omid Mirmotahari, Snorre Aunet:
Ultra low voltage and, nor and XOR CMOS gates. ICECS 2008: 846-849 - [c53]Mehdi Azadmehr, Yngvar Berg:
Cascade of Current-Starved Pseudo Floating-Gate inverters. ICECS 2008: 1030-1033 - [c52]Yngvar Berg, Omid Mirmotahari, Snorre Aunet:
Clocked semi-floating-gate ultra low-voltage current mirror. ICECS 2008: 1038-1041 - [c51]Yngvar Berg, Omid Mirmotahari, Johannes Goplen Lomsdalen, Snorre Aunet:
High Speed Ultra Low Voltage CMOS inverter. ISVLSI 2008: 122-127 - [c50]Omid Mirmotahari, Yngvar Berg:
Ultra Low Voltage High Speed Differential CMOS Inverter. PATMOS 2008: 328-337 - 2007
- [c49]Yngvar Berg, Mehdi Azadmehr, Omid Mirmotahari, Snorre Aunet:
Band Pass Pseudo Floating-Gate Amplifier. ICECS 2007: 506-509 - [c48]Henning Gundersen, Yngvar Berg:
Fast Addition Using Balanced Ternary Counters Designed with CMOS Semi-Floating Gate Devices. ISMVL 2007: 30 - [c47]Renè Jensen, Yngvar Berg:
Dual Data-Rate Cyclic D/A Converter Using Semi Floating-Gate Devices. ISMVL 2007: 37 - [c46]Yngvar Berg, Renè Jensen, Johannes Goplen Lomsdalen, Henning Gundersen, Snorre Aunet:
Fault Tolerant CMOS Logic Using Ternary Gates. ISMVL 2007: 38 - 2006
- [c45]Johannes Goplen Lomsdalen, Renè Jensen, Yngvar Berg:
Self-refreshing Multiple Valued Memory. DDECS 2006: 94-96 - [c44]Johannes Goplen Lomsdalen, Renè Jensen, Yngvar Berg:
Multiple Valued Counter. DDECS 2006: 247-249 - [c43]Yngvar Berg, Omid Mirmotahari, Per Andreas Norseng, Snorre Aunet:
Ultra low voltage CMOS gates. ICECS 2006: 818-821 - [c42]Henning Gundersen, Yngvar Berg:
A novel ternary more, less and equality circuit using recharged semi-floating gate devices. ISCAS 2006 - [c41]Øivind Næss, Yngvar Berg:
Switched pseudo floating-gate reconfigurable linear threshold elements. ISCAS 2006 - [c40]Henning Gundersen, Yngvar Berg:
A Novel Balanced Ternary Adder Using Recharged Semi-Floating Gate Devices. ISMVL 2006: 18 - [c39]Yngvar Berg, Omid Mirmotahari, Snorre Aunet:
Pseudo Floating-Gate Inverter with Feedback Control. VLSI-SoC 2006: 272-277 - 2005
- [c38]Øivind Næss, Snorre Aunet, Yngvar Berg:
Low-voltage pseudo floating-gate reconfigurable linear threshold elements. IJCNN 2005: 675-680 - [c37]Henning Gundersen, Renè Jensen, Yngvar Berg:
A Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices. ISMVL 2005: 54-58 - 2004
- [c36]Snorre Aunet, Bengt Oelmann, Suliman Abdalla, Yngvar Berg:
Reconfigurable subthreshold CMOS perceptron. IJCNN 2004: 1983-1988 - [c35]Henning Gundersen, Yngvar Berg:
Max and min functions using Multiple-Valued Recharged Semi-Floating Gate circuits. ISCAS (2) 2004: 857-860 - [c34]Omid Mirmotahari, Yngvar Berg:
A Systolic Parallel Multiplier over GF(3m) Using Neuron-MOS DLC. ISMVL 2004: 135-138 - [c33]Omid Mirmotahari, Yngvar Berg:
A Novel D-Latch in Multiple-Valued Semi-Floating-Gate Recharged Logic. ISMVL 2004: 210-213 - [c32]Yngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari:
Basic Multiple-Valued Functions Using Recharge CMOS Logic. ISMVL 2004: 346-351 - 2003
- [j2]Snorre Aunet, Yngvar Berg, Trond Sæther:
Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS. IEEE Trans. Neural Networks 14(5): 1244-1256 (2003) - [j1]Snorre Aunet, Yngvar Berg, Trond Sæther:
Erratum to "real-time reconfigurable linear threshold elements implemented in floating-gate CMOS". IEEE Trans. Neural Networks 14(6): 1582 (2003) - [c31]Øivind Næss, Espen A. Olsen, Yngvar Berg, Tor Sverre Lande:
A low voltage second order biquad using pseudo floating-gate transistors. ISCAS (1) 2003: 125-128 - [c30]Yngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Høvin:
Novel recharge semi-floating-gate CMOS logic for multiple-valued systems. ISCAS (5) 2003: 193-196 - [c29]Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin:
Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. ISCAS (1) 2003: 345-348 - [c28]Omid Mirmotahari, Yngvar Berg:
A Novel Multiple-Input Multiple-Valued Semi-Floating-Gate LATC. ISMVL 2003: 227-234 - [c27]Snorre Aunet, Yngvar Berg:
UV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3". IWANN (2) 2003: 57-64 - 2002
- [c26]Yngvar Berg, Øivind Næss, Snorre Aunet, Mats Høvin:
A novel floating-gate multiple-valued signal to binary signal converter. ICECS 2002: 575-578 - [c25]Yngvar Berg, Øivind Næss, Snorre Aunet, Johannes Goplen Lomsdalen, Mats Høvin:
A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic. ICECS 2002: 579-582 - [c24]Yngvar Berg, Øivind Næss, Snorre Aunet, Renè Jensen, Mats Høvin:
Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. ISCAS (5) 2002: 385-388 - [c23]Mats Høvin, Dag T. Wisland, Yngvar Berg, Tor Sverre Lande:
A low-voltage sinc2 decimator implemented by a new circuit technique using floating-gate MOS transistors. ISCAS (5) 2002: 397-400 - [c22]Johannes Goplen Lomsdalen, Yngvar Berg, Renè Jensen:
A low-voltage floating-gate CMOS transconductance amplifier, and a spin-off quasi frequency tripler. ISCAS (5) 2002: 501-504 - [c21]Mats Høvin, Dag T. Wisland, Yngvar Berg, Jan-Tore Marienborg, Tor Sverre Lande:
Delta-sigma modulation in single neurons. ISCAS (5) 2002: 617-620 - [c20]Øivind Næss, Yngvar Berg:
Tunable floating-gate low-voltage transconductor. ISCAS (4) 2002: 663-666 - [c19]Yngvar Berg, Snorre Aunet, Øivind Næss, O. Hagen, Mats Høvin:
A novel floating-gate multiple-valued CMOS full-adder. ISCAS (1) 2002: 877-880 - 2001
- [c18]Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin:
A 0.3 V floating-gate differential amplifier input stage with tunable gain. ICECS 2001: 413-416 - [c17]Snorre Aunet, Yngvar Berg, Øivind Næss, Trond Sæther:
Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functions. ICECS 2001: 581-584 - [c16]Snorre Aunet, Yngvar Berg, Trond Ytterdal, Øivind Næss, Trond Sæther:
A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits. ICECS 2001: 1035-1038 - [c15]Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin:
A novel low-voltage floating-gate CMOS transconductance amplifier with sinh (tanh) shaped output current. ICECS 2001: 1461-1464 - [c14]Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin:
Floating-gate CMOS differential analog inverter for ultra low-voltage applications. ISCAS (1) 2001: 9-12 - [c13]Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin:
Extreme low-voltage floating-gate CMOS transconductance amplifier. ISCAS (1) 2001: 37-40 - [c12]Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin:
Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. ISCAS (4) 2001: 838-841 - 2000
- [c11]Yngvar Berg, Øivind Næss, Mats Høvin:
Ultralow-voltage floating-gate analog multiplier with tunable linearity. ISCAS 2000: 245-248 - [c10]Yngvar Berg, Øivind Næss, Mats Høvin:
Ultra low-voltage floating-gate transconductance amplifier with tunable gain and linearity. ISCAS 2000: 343-346 - [c9]Yngvar Berg, Øivind Næss, Mats Høvin:
Ultra low-voltage floating-gate transconductance amplifier. ISCAS 2000: 347-350 - [c8]Tor Sverre Lande, Jan-Tore Marienborg, Yngvar Berg:
Neuromorphic cochlea implants. ISCAS 2000: 401-404 - [c7]Øivind Næss, Yngvar Berg:
Tunable ultralow voltage transconductance amplifier and GmC filter. ISCAS 2000: 709-712
1990 – 1999
- 1999
- [c6]Yngvar Berg, Tor Sverre Lande:
Ultra low voltage current multiplier/divider. ICECS 1999: 1369-1372 - [c5]Yngvar Berg, Tor Sverre Lande:
Tunable current mirrors for ultra low voltage. ISCAS (2) 1999: 17-20 - [c4]Yngvar Berg, Tor Sverre Lande:
Area efficient circuit tuning with floating-gate techniques. ISCAS (2) 1999: 396-399 - 1998
- [c3]Tor Sverre Lande, Yngvar Berg:
Ultra low voltage transconductance amplifier. ICECS 1998: 333-336 - 1996
- [c2]Tor Sverre Lande, Dag T. Wisland, Trond Sæther, Yngvar Berg:
FLOGIC-Floating-gate logic for low-power operation. ICECS 1996: 1041-1044 - 1995
- [c1]Yngvar Berg, Jon-Erik Ruth, Tor Sverre Lande:
Scalable Mean Rate Signal Encoding Analog Neural Network. ISCAS 1995: 1668-1671
Coauthor Index
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