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Santosh Ghosh
2020 – today
- 2024
- [j32]Archisman Ghosh, Debayan Das, Santosh Ghosh, Shreyas Sen:
Switch Capacitor-Based Time-Varying Transfer Function for FCN and CNN MLSCA-Resistant AES256 in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 405-409 (2024) - [i27]Archisman Ghosh, Dong-Hyun Seo, Debayan Das, Santosh Ghosh, Shreyas Sen:
R-STELLAR: A Resilient Synthesizable Signature Attenuation SCA Protection on AES-256 with built-in Attack-on-Countermeasure Detection. CoRR abs/2408.12021 (2024) - [i26]Archisman Ghosh, Md. Abdur Rahman, Debayan Das, Santosh Ghosh, Shreyas Sen:
Exploiting Clock-Slew Dependent Variability in CMOS Digital Circuits Towards Power and EM SCA Resilience. IACR Cryptol. ePrint Arch. 2024: 1019 (2024) - [i25]Parisa Amiri-Eliasi, Yanis Belkheyar, Joan Daemen, Santosh Ghosh, Daniël Kuijsters, Alireza Mehrdad, Silvia Mella, Shahram Rasoolzadeh, Gilles Van Assche:
Koala: A Low-Latency Pseudorandom Function. IACR Cryptol. ePrint Arch. 2024: 1249 (2024) - [i24]Archisman Ghosh, Dong-Hyun Seo, Debayan Das, Santosh Ghosh, Shreyas Sen:
R-STELLAR: A Resilient Synthesizable Signature Attenuation SCA Protection on AES-256 with built-in Attack-on-Countermeasure Detection. IACR Cryptol. ePrint Arch. 2024: 1309 (2024) - 2023
- [j31]Archisman Ghosh, Jose Maria Bermudo Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen:
A 334 μW 0.158 mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom-Cook Multiplication. IEEE J. Solid State Circuits 58(8): 2383-2398 (2023) - [j30]Dong-Hyun Seo, Archisman Ghosh, Debayan Das, Mayukh Nath, Santosh Ghosh, Shreyas Sen:
PG-CAS: Pro-Active EM-SCA Probe Detection Using Switched-Capacitor-Based Patterned-Ground Co-Planar Capacitive Asymmetry Sensing. IEEE Open J. Circuits Syst. 4: 271-282 (2023) - [j29]Mandhir Kumar Verma, Vivekananda Mukherjee, Vinod Kumar Yadav, Santosh Ghosh:
A novel methodology for the planning of charging infrastructure in the scenario of high EV penetration. Soft Comput. 27(9): 5623-5640 (2023) - [j28]Aikata, Ahmet Can Mert, David Jacquemin, Amitabh Das, Donald Matthews, Santosh Ghosh, Sujoy Sinha Roy:
A Unified Cryptoprocessor for Lattice-Based Signature and Key-Exchange. IEEE Trans. Computers 72(6): 1568-1580 (2023) - [j27]Dong-Hyun Seo, Mayukh Nath, Debayan Das, Santosh Ghosh, Shreyas Sen:
Improved EM Side-Channel Analysis Attack Probe Detection Range Utilizing Coplanar Capacitive Asymmetry Sensing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4583-4596 (2023) - [j26]Yanis Belkheyar, Joan Daemen, Christoph Dobraunig, Santosh Ghosh, Shahram Rasoolzadeh:
BipBip: A Low-Latency Tweakable Block Cipher with Small Dimensions. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2023(1): 326-368 (2023) - [c44]Archisman Ghosh, Md. Abdur Rahman, Debayan Das, Santosh Ghosh, Shreyas Sen:
Power and EM SCA Resilience in 65nm AES-256 Exploiting Clock-Slew Dependent Variability in CMOS Digital Circuits. CICC 2023: 1-2 - [c43]Anupam Golder, Debayan Das, Santosh Ghosh, Avinash Varna, Majid Sabbagh, Sayak Ray, Rana Elnaggar, Joseph Friel, Daniel Dinu, Jason M. Fung:
Power Side-Channel Vulnerability Assessment of Lightweight Cryptographic Scheme, XOODYAK. DAC 2023: 1-6 - [i23]Archisman Ghosh, Jose Maria Bermudo Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen:
A 334μW 0.158mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber with Low-latency Striding Toom-Cook Multiplication Authors Version. CoRR abs/2305.10368 (2023) - [i22]Archisman Ghosh, Jose Maria Bermudo Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen:
A 334µW 0.158mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber with Low-latency Striding Toom-Cook Multiplication Extended Version. IACR Cryptol. ePrint Arch. 2023: 678 (2023) - [i21]Yanis Belkheyar, Joan Daemen, Christoph Dobraunig, Santosh Ghosh, Shahram Rasoolzadeh:
Introducing two Low-Latency Cipher Families: Sonic and SuperSonic. IACR Cryptol. ePrint Arch. 2023: 878 (2023) - 2022
- [j25]Josef Danial, Debayan Das, Anupam Golder, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
EM-X-DL: Efficient Cross-device Deep Learning Side-channel Attack With Noisy EM Signatures. ACM J. Emerg. Technol. Comput. Syst. 18(1): 4:1-4:17 (2022) - [j24]Archisman Ghosh, Debayan Das, Josef Danial, Vivek De, Santosh Ghosh, Shreyas Sen:
Syn-STELLAR: An EM/Power SCA-Resilient AES-256 With Synthesis-Friendly Signature Attenuation. IEEE J. Solid State Circuits 57(1): 167-181 (2022) - [j23]Debayan Das, Mayukh Nath, Baibhab Chatterjee, Raghavan Kumar, Xiaosen Liu, Harish Krishnamurthy, Manoj R. Sastry, Sanu Mathew, Santosh Ghosh, Shreyas Sen:
EM SCA White-Box Analysis-Based Reduced Leakage Cell Design and Presilicon Evaluation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4927-4938 (2022) - [j22]Jan Richter-Brockmann, Ming-Shing Chen, Santosh Ghosh, Tim Güneysu:
Racing BIKE: Improved Polynomial Multiplication and Inversion in Hardware. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 557-588 (2022) - [c42]Archisman Ghosh, Jose Maria Bermudo Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen:
A 334uW 0.158mm2 Saber Learning with Rounding based Post-Quantum Crypto Accelerator. CICC 2022: 1-2 - [c41]Archisman Ghosh, Dong-Hyun Seo, Debayan Das, Santosh Ghosh, Shreyas Sen:
A Digital Cascoded Signature Attenuation Countermeasure with Intelligent Malicious Voltage Drop Attack Detector for EM/Power SCA Resilient Parallel AES-256. CICC 2022: 1-2 - [c40]Archisman Ghosh, Debayan Das, Santosh Ghosh, Shreyas Sen:
EM SCA & FI Self-Awareness and Resilience with Single On-chip Loop & ML Classifiers. DATE 2022: 592-595 - [i20]Archisman Ghosh, Jose Maria Bermudo Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen:
A 334uW 0.158mm2 Saber Learning with Rounding based Post-Quantum Crypto Accelerator. CoRR abs/2201.07375 (2022) - [i19]Aikata, Ahmet Can Mert, David Jacquemin, Amitabh Das, Donald Matthews, Santosh Ghosh, Sujoy Sinha Roy:
A Unified Cryptoprocessor for Lattice-based Signature and Key-exchange. CoRR abs/2210.07412 (2022) - [i18]Thomas Hanson, Qian Wang, Santosh Ghosh, Fernando Virdia, Anne Reinders, Manoj R. Sastry:
Optimization for SPHINCS+ using Intel Secure Hash Algorithm Extensions. IACR Cryptol. ePrint Arch. 2022: 1726 (2022) - 2021
- [j21]Debayan Das, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
EM/Power Side-Channel Attack: White-Box Modeling and Signature Attenuation Countermeasures. IEEE Des. Test 38(3): 67-75 (2021) - [j20]Debayan Das, Josef Danial, Anupam Golder, Nirmoy Modak, Shovan Maity, Baibhab Chatterjee, Dong-Hyun Seo, Muya Chang, Avinash Varna, Harish K. Krishnamurthy, Sanu Mathew, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
EM and Power SCA-Resilient AES-256 Through >350× Current-Domain Signature Attenuation and Local Lower Metal Routing. IEEE J. Solid State Circuits 56(1): 136-150 (2021) - [c39]Dong-Hyun Seo, Mayukh Nath, Debayan Das, Santosh Ghosh, Shreyas Sen:
Enhanced Detection Range for EM Side-channel Attack Probes utilizing Co-planar Capacitive Asymmetry Sensing. DATE 2021: 1016-1019 - [c38]Dong-Hyun Seo, Mayukh Nath, Debayan Das, Baibhab Chatterjee, Santosh Ghosh, Shreyas Sen:
PG-CAS: Patterned-Ground Co-Planar Capacitive Asymmetry Sensing for mm-Range EM Side-Channel Attack Probe Detection. ISCAS 2021: 1-5 - [c37]Archisman Ghosh, Debayan Das, Josef Danial, Vivek De, Santosh Ghosh, Shreyas Sen:
36.2 An EM/Power SCA-Resilient AES-256 with Synthesizable Signature Attenuation Using Digital-Friendly Current Source and RO-Bleed-Based Integrated Local Feedback and Global Switched-Mode Control. ISSCC 2021: 499-501 - [c36]Michael LeMay, Joydeep Rakshit, Sergej Deutsch, David M. Durham, Santosh Ghosh, Anant Nori, Jayesh Gaur, Andrew Weiler, Salmin Sultana, Karanvir Grewal, Sreenivas Subramoney:
Cryptographic Capability Computing. MICRO 2021: 253-267 - [c35]Mahesh Balakrishnan, Chen Shen, Ahmed Jafri, Suyog Mapara, David Geraghty, Jason Flinn, Vidhya Venkat, Ivailo Nedelchev, Santosh Ghosh, Mihir Dharamshi, Jingming Liu, Filip Gruszczynski, Jun Li, Rounak Tibrewal, Ali Zaveri, Rajeev Nagar, Ahmed Yossef, Francois Richard, Yee Jiun Song:
Log-structured Protocols in Delos. SOSP 2021: 538-552 - [i17]Jan Richter-Brockmann, Ming-Shing Chen, Santosh Ghosh, Tim Güneysu:
Racing BIKE: Improved Polynomial Multiplication and Inversion in Hardware. IACR Cryptol. ePrint Arch. 2021: 1344 (2021) - [i16]Aikata, Ahmet Can Mert, David Jacquemin, Amitabh Das, Donald Matthews, Santosh Ghosh, Sujoy Sinha Roy:
A Unified Cryptoprocessor for Lattice-based Signature and Key-exchange. IACR Cryptol. ePrint Arch. 2021: 1461 (2021) - [i15]Andrea Basso, Furkan Aydin, Daniel Dinu, Joseph Friel, Avinash Varna, Manoj R. Sastry, Santosh Ghosh:
Where Star Wars Meets Star Trek: SABER and Dilithium on the Same Polynomial Multiplier. IACR Cryptol. ePrint Arch. 2021: 1697 (2021) - 2020
- [j19]Josef Danial, Debayan Das, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
SCNIFFER: Low-Cost, Automated, Efficient Electromagnetic Side-Channel Sniffing. IEEE Access 8: 173414-173427 (2020) - [j18]Danilo Sijacic, Josep Balasch, Bohan Yang, Santosh Ghosh, Ingrid Verbauwhede:
Towards efficient and automated side-channel evaluations at design time. J. Cryptogr. Eng. 10(4): 305-319 (2020) - [j17]Mandhir Kumar Verma, Vivekananda Mukherjee, Vinod Kumar Yadav, Santosh Ghosh:
Constraints for effective distribution network expansion planning: an ample review. Int. J. Syst. Assur. Eng. Manag. 11(3): 531-546 (2020) - [c34]Debayan Das, Josef Danial, Anupam Golder, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
Deep Learning Side-Channel Attack Resilient AES-256 using Current Domain Signature Attenuation in 65nm CMOS. CICC 2020: 1-4 - [c33]Luis S. Kida, Soham Jayesh Desai, Alpa Trivedi, Reshma Lal, Vincent Scarlata, Santosh Ghosh:
HCC: 100 Gbps AES-GCM Encrypted Inline DMA Transfers Between SGX Enclave and FPGA Accelerator. ICICS 2020: 276-291 - [c32]Michael E. Kounavis, Sergej Deutsch, Santosh Ghosh, David Durham:
K-Cipher: A Low Latency, Bit Length Parameterizable Cipher. ISCC 2020: 1-7 - [c31]Debayan Das, Josef Danial, Anupam Golder, Nirmoy Modak, Shovan Maity, Baibhab Chatterjee, Dong-Hyun Seo, Muya Chang, Avinash Varna, Harish Krishnamurthy, Sanu Mathew, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
27.3 EM and Power SCA-Resilient AES-256 in 65nm CMOS Through >350× Current-Domain Signature Attenuation. ISSCC 2020: 424-426 - [c30]Debayan Das, Mayukh Nath, Santosh Ghosh, Shreyas Sen:
Killing EM Side-Channel Leakage at its Source. MWSCAS 2020: 1108-1111 - [c29]Mahesh Balakrishnan, Jason Flinn, Chen Shen, Mihir Dharamshi, Ahmed Jafri, Xiao Shi, Santosh Ghosh, Hazem Hassan, Aaryaman Sagar, Rhed Shi, Jingming Liu, Filip Gruszczynski, Xianan Zhang, Huy Hoang, Ahmed Yossef, Francois Richard, Yee Jiun Song:
Virtual Consensus in Delos. OSDI 2020: 617-632 - [c28]Andrew H. Reinders, Rafael Misoczki, Santosh Ghosh, Manoj R. Sastry:
Efficient BIKE Hardware Design with Constant-Time Decoder. QCE 2020: 197-204 - [i14]Josef Danial, Debayan Das, Anupam Golder, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
EM-X-DL: Efficient Cross-Device Deep Learning Side-Channel Attack with Noisy EM Signatures. CoRR abs/2011.06139 (2020) - [i13]Michael E. Kounavis, Sergej Deutsch, Santosh Ghosh, David Durham:
Κ-Cipher: A Low Latency, Bit Length Parameterizable Cipher. IACR Cryptol. ePrint Arch. 2020: 30 (2020) - [i12]Andrew H. Reinders, Rafael Misoczki, Santosh Ghosh, Manoj R. Sastry:
Efficient BIKE Hardware Design with Constant-Time Decoder. IACR Cryptol. ePrint Arch. 2020: 117 (2020) - [i11]Santosh Ghosh, Luis S. Kida, Soham Jayesh Desai, Reshma Lal:
A >100 Gbps Inline AES-GCM Hardware Engine and Protected DMA Transfers between SGX Enclave and FPGA Accelerator Device. IACR Cryptol. ePrint Arch. 2020: 178 (2020) - [i10]Santosh Ghosh, Michael E. Kounavis, Sergej Deutsch:
Gimli Encryption in 715.9 psec. IACR Cryptol. ePrint Arch. 2020: 336 (2020)
2010 – 2019
- 2019
- [j16]Santosh Ghosh, Rafael Misoczki, Manoj R. Sastry:
Intelligent IoT Motes: Preventing Their Abuse at the Weakest Entry Point. IEEE Des. Test 36(2): 73-80 (2019) - [j15]Sikhar Patranabis, Debapriya Basu Roy, Anirban Chakraborty, Naveen Nagar, Astikey Singh, Debdeep Mukhopadhyay, Santosh Ghosh:
Lightweight Design-for-Security Strategies for Combined Countermeasures Against Side Channel and Fault Analysis in IoT Applications. J. Hardw. Syst. Secur. 3(2): 103-131 (2019) - [j14]Anupam Golder, Debayan Das, Josef Danial, Santosh Ghosh, Shreyas Sen, Arijit Raychowdhury:
Practical Approaches Toward Deep-Learning-Based Cross-Device Power Side-Channel Attack. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2720-2733 (2019) - [c27]Debayan Das, Anupam Golder, Josef Danial, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
X-DeepSCA: Cross-Device Deep Learning Side Channel Attack. DAC 2019: 134 - [c26]Debayan Das, Mayukh Nath, Baibhab Chatterjee, Santosh Ghosh, Shreyas Sen:
STELLAR: A Generic EM Side-Channel Attack Protection through Ground-Up Root-cause Analysis. HOST 2019: 11-20 - [i9]Josef Danial, Debayan Das, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
SCNIFFER: Low-Cost, Automated, EfficientElectromagnetic Side-Channel Sniffing. CoRR abs/1908.09407 (2019) - [i8]Santosh Ghosh, Andrew H. Reinders, Rafael Misoczki, Manoj R. Sastry:
Anonymous Attestation for IoT. IACR Cryptol. ePrint Arch. 2019: 121 (2019) - [i7]Santosh Ghosh, Rafael Misoczki, Manoj R. Sastry:
Lightweight Post-Quantum-Secure Digital Signature Approach for IoT Motes. IACR Cryptol. ePrint Arch. 2019: 122 (2019) - [i6]Debayan Das, Anupam Golder, Josef Danial, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
X-DeepSCA: Cross-Device Deep Learning Side Channel Attack. IACR Cryptol. ePrint Arch. 2019: 818 (2019) - 2018
- [j13]Debayan Das, Shovan Maity, Saad Bin Nasir, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
ASNI: Attenuated Signature Noise Injection for Low-Overhead Power Side-Channel Attack Immunity. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3300-3311 (2018) - [c25]Danilo Sijacic, Josep Balasch, Bohan Yang, Santosh Ghosh, Ingrid Verbauwhede:
Towards Efficient and Automated Side Channel Evaluations at Design Time. PROOFS 2018: 16-31 - [c24]Tanay Karnik, Dileep Kurian, Paolo A. Aseron, Richard Dorrance, Erkan Alpman, Angela Nicoara, Roman Popov, Leonid Azarenkov, Mikhail J. Moiseev, Li Zhao, Santosh Ghosh, Rafael Misoczki, Ankit Gupta, M. Akhila, Sriram Muthukumar, Saurabh Bhandari, Satish Yada, Kartik Jain, Robert Flory, Chanitnan Kanthapanit, Eduardo Quijano, Bradley Jackson, Hao Luo, Suhwan Kim, Vaibhav A. Vaidya, Adel Elsherbini, Renzhi Liu, Farhana Sheikh, Omesh Tickoo, Ilya Klotchkov, Manoj R. Sastry, Sheldon Sun, Mukesh Bhartiya, Anuradha Srinivasan, Yatin Hoskote, Hong Wang, Vivek De:
A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS. ISSCC 2018: 46-48 - [i5]Monodeep Kar, Arvind Singh, Sanu Mathew, Santosh Ghosh, Anand Rajan, Vivek De, Raheem A. Beyah, Saibal Mukhopadhyay:
Blindsight: Blinding EM Side-Channel Leakage using Built-In Fully Integrated Inductive Voltage Regulator. CoRR abs/1802.09096 (2018) - [i4]Debayan Das, Mayukh Nath, Baibhab Chatterjee, Santosh Ghosh, Shreyas Sen:
Ground-up Root-cause Analysis guided Low-Overhead Generic Countermeasure for Electro-Magnetic Side-Channel Attack. IACR Cryptol. ePrint Arch. 2018: 620 (2018) - 2017
- [j12]Rajat Sadhukhan, Sikhar Patranabis, Ashrujit Ghoshal, Debdeep Mukhopadhyay, Vishal Saraswat, Santosh Ghosh:
An Evaluation of Lightweight Block Ciphers for Resource-Constrained Applications: Area, Performance, and Security. J. Hardw. Syst. Secur. 1(3): 203-218 (2017) - [c23]Debayan Das, Shovan Maity, Saad Bin Nasir, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
High efficiency power side-channel attack immunity using noise injection in attenuated signature domain. HOST 2017: 62-67 - [c22]Santosh Ghosh, Rafael Misoczki, Li Zhao, Manoj R. Sastry:
Lightweight Block Cipher Circuits for Automotive and IoT Sensor Devices. HASP@ISCA 2017: 5:1-5:7 - [c21]Ayon Chakraborty, Arani Bhattacharya, Santosh Ghosh, Samir R. Das:
A first look at performance of TV streaming sticks. Sarnoff Symposium 2017: 1-6 - [i3]Debayan Das, Shovan Maity, Saad Bin Nasir, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
High Efficiency Power Side-Channel Attack Immunity using Noise Injection in Attenuated Signature Domain. CoRR abs/1703.10328 (2017) - 2016
- [c20]Sikhar Patranabis, Debapriya Basu Roy, Yash Shrivastava, Debdeep Mukhopadhyay, Santosh Ghosh:
Parsimonious design strategy for linear layers with high diffusion in block ciphers. HOST 2016: 31-36 - [c19]Sikhar Patranabis, Debapriya Basu Roy, Praveen Kumar Vadnala, Debdeep Mukhopadhyay, Santosh Ghosh:
Shuffling across rounds: A lightweight strategy to counter side-channel attacks. ICCD 2016: 440-443 - 2015
- [i2]Santosh Ghosh, Amit Kumar, Amitabh Das, Ingrid Verbauwhede:
On the Implementation of Unified Arithmetic on Binary Huff Curves. IACR Cryptol. ePrint Arch. 2015: 423 (2015) - 2014
- [j11]Vinod Kumar Yadav, Niranjan Kumar, Santosh Ghosh, Kanwardeep Singh:
Indian thermal power plant challenges and remedies via application of modified data envelopment analysis. Int. Trans. Oper. Res. 21(6): 955-977 (2014) - [j10]Santosh Ghosh, Ingrid Verbauwhede:
BLAKE-512-Based 128-Bit CCA2 Secure Timing Attack Resistant McEliece Cryptoprocessor. IEEE Trans. Computers 63(5): 1124-1133 (2014) - [c18]Santosh Ghosh:
On the implementation of mceliece with CCA2 indeterminacy by SHA-3. ISCAS 2014: 2804-2807 - 2013
- [j9]Amitabh Das, Jean DaRolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede:
Secure JTAG Implementation Using Schnorr Protocol. J. Electron. Test. 29(2): 193-209 (2013) - [j8]Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta:
First-order DPA Vulnerability of Rijndael: Security and Area-delay Optimization Trade-off. Int. J. Netw. Secur. 15(3): 219-230 (2013) - [j7]Amitabh Das, Baris Ege, Santosh Ghosh, Lejla Batina, Ingrid Verbauwhede:
Security Analysis of Industrial Test Compression Schemes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1966-1977 (2013) - [j6]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Secure Dual-Core Cryptoprocessor for Pairings Over Barreto-Naehrig Curves on FPGA Platform. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 434-442 (2013) - [c17]Santosh Ghosh, Amit Kumar, Amitabh Das, Ingrid Verbauwhede:
On the Implementation of Unified Arithmetic on Binary Huff Curves. CHES 2013: 349-364 - 2012
- [j5]Jean DaRolt, Amitabh Das, Santosh Ghosh, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede:
Scan attacks on side-channel and fault attack resistant public-key implementations. J. Cryptogr. Eng. 2(4): 207-219 (2012) - [c16]Santosh Ghosh, Jeroen Delvaux, Leif Uhsadel, Ingrid Verbauwhede:
A Speed Area Optimized Embedded Co-processor for McEliece Cryptosystem. ASAP 2012: 102-108 - [c15]Baris Ege, Amitabh Das, Santosh Ghosh, Ingrid Verbauwhede:
Differential Scan Attack on AES with X-tolerant and X-masked Test Response Compactor. DSD 2012: 545-552 - [c14]Santosh Ghosh, Ingrid Verbauwhede, Dipanwita Roy Chowdhury:
Core Based Architecture to Speed Up Optimal Ate Pairing on FPGA Platform. Pairing 2012: 141-159 - [c13]Arpan Mondal, Santosh Ghosh, Abhijit Das, Dipanwita Roy Chowdhury:
Efficient FPGA Implementation of Montgomery Multiplier Using DSP Blocks. VDAT 2012: 370-372 - 2011
- [j4]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Fault Attack, Countermeasures on Pairing Based Cryptography. Int. J. Netw. Secur. 12(1): 21-28 (2011) - [j3]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Petrel: Power and Timing Attack Resistant Elliptic Curve Scalar Multiplier Based on Programmable GF(p) Arithmetic Unit. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(8): 1798-1812 (2011) - [c12]Santosh Ghosh, Dipanwita Roy Chowdhury, Abhijit Das:
High Speed Cryptoprocessor for η T Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields. CHES 2011: 442-458 - [c11]Santosh Ghosh, Dipanwita Roy Chowdhury:
Security of Prime Field Pairing Cryptoprocessor against Differential Power Attack. InfoSecHiComNet 2011: 16-29 - [c10]Santosh Ghosh:
Design and Analysis of Pairing Based Cryptographic Hardware for Prime Fields. ISVLSI 2011: 363-364 - [i1]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Security of Prime Field Pairing Cryptoprocessor Against Differential Power Attack. IACR Cryptol. ePrint Arch. 2011: 181 (2011) - 2010
- [c9]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
High speed Fp multipliers and adders on FPGA platform. DASIP 2010: 21-26 - [c8]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
High Speed Flexible Pairing Cryptoprocessor on FPGA Platform. Pairing 2010: 450-466
2000 – 2009
- 2009
- [j2]Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, Indranil Sengupta:
Parallel crypto-devices for GF(p) elliptic curve multiplication resistant against side channel attacks. Comput. Electr. Eng. 35(2): 329-338 (2009) - [j1]Monjur Alam, Santosh Ghosh, M. J. Mohan, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, Indranil Sengupta:
Effect of glitches against masked AES S-box implementation and countermeasure. IET Inf. Secur. 3(1): 34-44 (2009) - 2008
- [c7]Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, Indranil Sengupta:
A GF(p) elliptic curve group operator resistant against side channel attacks. ACM Great Lakes Symposium on VLSI 2008: 53-58 - [c6]Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta:
Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. VLSI Design 2008: 693-698 - 2007
- [c5]Monjur Alam, Sonai Ray, Debdeep Mukhopadhyay, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta:
An area optimized reconfigurable encryptor for AES-Rijndael. DATE 2007: 1116-1121 - [c4]Santosh Ghosh, Monjur Alam, Indranil Sengupta, Dipanwita Roy Chowdhury:
A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography. DSD 2007: 109-115 - [c3]Avishek Saha, Santosh Ghosh:
A Speed-Area Optimization of Full Search Block Matching Hardware with Applications in High-Definition TVs (HDTV). HiPC 2007: 83-94 - [c2]Santosh Ghosh, Avishek Saha:
Speed-area optimized FPGA implementation for Full Search Block Matching. ICCD 2007: 13-18 - [c1]Avishek Saha, Santosh Ghosh, Shamik Sural, Jayanta Mukherjee:
Toward Memory-efficient Design of Video Encoders for Multimedia Applications. ISVLSI 2007: 453-454
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Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
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Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
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Load additional information about publications from .
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last updated on 2025-01-20 23:02 CET by the dblp team
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