CERN Accelerating science

CERN Document Server 52 záznamov nájdených  1 - 10ďalšíkoniec  skoč na záznam: Hľadanie trvalo 1.28 sekúnd. 
1.
The AM08 Associative Memory ASIC Design, Architecture and Evaluation methodology / ATLAS Collaboration
The Associative Memory (AM) ASIC reached its version 8 in 2020 when it was submitted for fabrication. [...]
ATL-DAQ-PROC-2022-022.
- 2022. - 5 p.
Original Communication (restricted to ATLAS) - Full text
2.
Cooling and Timing Tests of the ATLAS Fast Tracker VME boards / Sottocornola, Simone (INFN Pavia and Universita' di Pavia) /ATLAS Collaboration
The Fast Tracker Processor (FTK) is an ATLAS trigger upgrade built for full event, low-latency, high-rate tracking. The FTK core, made of 9U VME boards, performs the most demanding computational task. [...]
ATL-DAQ-SLIDE-2020-417.- Geneva : CERN, 2020 - 5 p. Fulltext: PDF; External link: Original Communication (restricted to ATLAS)
In : 22nd IEEE Real Time Conference, Virtual, Vietnam, 12 - 23 Oct 2020
3.
Cooling and Timing Tests of the ATLAS Fast TracKer VME Boards / ATLAS Collaboration
The Fast Tracker (FTK) is an ATLAS trigger upgrade built for full event, low-latency, high-rate tracking. [...]
arXiv:2010.14456 ; ATL-DAQ-PROC-2020-020.
- 2021-07-02 - 8.
Original Communication (restricted to ATLAS) - Full text - Fulltext - Fulltext
4.
Performance Studies of the Associative Memory System of the ATLAS Fast Tracker / Iizawa, Tomoya (Departement de Physique Nucleaire et Corpusculaire, Universite de Geneve) /ATLAS Collaboration
The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM System is one of the two main processing elements of FTK and is mainly based on the use of Application Specific Integrated Circuits, the AM chips, specifically designed to execute pattern matching with a high degree of parallelism. [...]
ATL-DAQ-SLIDE-2018-1013.- Geneva : CERN, 2018 - 1 p. Fulltext: PDF; External link: Original Communication (restricted to ATLAS)
In : 2018 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC 2018), Sydney, Australia, 10 - 17 Nov 2018
5.
The ATLAS Fast TracKer - Architecture, Status and High-Level Data Quality Monitoring Framework / Marantis, Alexandros (Hellenic Open University, Patras)
The Fast Tracker (FTK) is a highly parallel processor dedicated to quickly and efficiently reconstructing tracks in the Pixel and Semiconductor Tracker (SCT) detectors of the ATLAS experiment at LHC. [...]
ATL-DAQ-PROC-2018-041.
- 2019. - 8 p.
Original Communication (restricted to ATLAS) - Full text - Full text
6.
The ATLAS Fast TracKer / Marantis, Alexandros (Hellenic Open University, Patras) /ATLAS Collaboration
The Fast Tracker (FTK) is a highly parallel processor dedicated to quickly and efficiently reconstructing tracks in the pixel and SCT detectors of the ATLAS experiment at LHC. It is designed to identify charged particle tracks with transverse momentum above 1 GeV and reconstruct their parameters at an event rate of up to 100kHz. [...]
ATL-DAQ-SLIDE-2018-833.- Geneva : CERN, 2018 - 1 p. Fulltext: PDF; External link: Original Communication (restricted to ATLAS)
In : 7th International Conference on New Frontiers in Physics, Kolymbari, Crete, Greece, 4 - 12 Jul 2018
7.
ATLAS Hardware Based Track-Finding: Present and Future / Seiss, Todd (University of Chicago, Enrico Fermi Institute) /ATLAS Collaboration
The ATLAS Fast TracKer (FTK) is a hardware based track finder for the ATLAS trigger infrastructure currently under installation and commissioning. FTK sits between the two layers of the current ATLAS trigger system, the hardware-based Level 1 Trigger and the CPU-based High-Level Trigger (HLT). [...]
ATL-DAQ-SLIDE-2018-525.- Geneva : CERN, 2018 - 30 p. Fulltext: PDF; External link: Original Communication (restricted to ATLAS)
In : 23rd International Conference on Computing in High Energy and Nuclear Physics, CHEP 2018, Sofia, Bulgaria, 9 - 13 Jul 2018
8.
Design of the ATLAS phase-II hardware-based tracking processor / Poggi, Riccardo (Departement de Physique Nucleaire et Corpusculaire, Universite de Geneve)
The expected factor four increase in peak luminosity of the high-luminosity LHC (HL-LHC) compared to the current system will force the ATLAS experiment to increase early stage trigger selection power. [...]
ATL-DAQ-PROC-2018-011.
- 2018. - 3 p.
Original Communication (restricted to ATLAS) - Full text
9.
The associative memory for the self-triggered SLIM5 silicon telescope / Batignani, G (U. Pisa (main) ; INFN, Pisa) ; Bettarini, S (U. Pisa (main) ; INFN, Pisa) ; Calderini, G (U. Pisa (main) ; INFN, Pisa) ; Cenci, R (U. Pisa (main) ; INFN, Pisa) ; Cervelli, A (U. Pisa (main) ; INFN, Pisa) ; Crescioli, F (U. Pisa (main) ; INFN, Pisa) ; Dell'Orso, M (U. Pisa (main) ; INFN, Pisa) ; Forti, F (U. Pisa (main) ; INFN, Pisa) ; Giannetti, P (INFN, Pisa) ; Giorgi, M A (U. Pisa (main) ; INFN, Pisa) et al.
Modern experiments search for extremely rare processes hidden in much larger background levels. As the experiment complexity, the accelerator backgrounds and luminosity increase we need increasingly exclusive selections to efficiently select the rare events inside the huge background. [...]
2009 - 5 p. - Published in : 10.1109/NSSMIC.2008.4774945
In : 2008 IEEE Nuclear Science Symposium, Medical Imaging Conference and 16th Room Temperature Semiconductor Detector Workshop, Dresden, Germany, 19 - 25 Oct 2008, pp.2765-2769
10.
Track finding mezzanine for Level-1 triggering in HL-LHC experiments / Gentsos, Christos (INFN, Perugia ; Perugia U.) ; Fedi, Giacomo (INFN, Pisa ; Pisa U.) ; Magazzù, Guido (INFN, Pisa ; Pisa U.) ; Magalotti, Daniel (INFN, Perugia ; Perugia U.) ; Modak, Atanu (INFN, Perugia ; Perugia U.) ; Storchi, Loriano (INFN, Perugia ; Perugia U.) ; Palla, Fabrizio (INFN, Pisa ; Pisa U.) ; Bilei, Gian Mario (INFN, Perugia ; Perugia U.) ; Biesuz, Nicolò (INFN, Pisa ; Pisa U.) ; Roy Chowdhury, Suvankar (Saha Inst.) et al.
The increase of the luminosity in the High Luminosity upgrade of the CERN Large Hadron Collider (HL-LHC) will require the use of Tracker information in the evaluation of the Level-1 trigger in order to keep the trigger rate acceptable (i.e.: <;1MHz). In order to extract the track information within the latency constraints (<;5μs), a custom real-time system is necessary. [...]
2017 - 4 p. - Published in : 10.1109/MOCAST.2017.7937676

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