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RD53 analog front-end processors for the ATLAS and CMS experiments at the High-Luminosity LHC / RD53 Collaboration
This work discusses the design and the main results relevant to the characterization of analog front-end processors in view of their operation in the pixel detector readout chips of ATLAS and CMS at the High-Luminosity LHC. The front-end channels presented in this paper are part of RD53A, a large scale demonstrator designed in a 65 nm CMOS technology by the RD53 collaboration.The collaboration is now developing the full-sized readout chips for the actual experiments. [...]
SISSA, 2020 - 9 p. - Published in : PoS Vertex2019 (2020) 021 Fulltext from Publisher: PDF;
In : Vertex 2019: 28th International Workshop on Vertex Detectors, Lopud Island, Croatia, 13 - 18 Oct 2019, pp.021

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RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades / RD53 collaboration
The Phase 2 upgrades of silicon pixel detectors at HL-LHC experiments feature extreme require- ments, such as: 50x50 μm pixels, high rate (3 GHz/cm2), unprecedented radiation levels (1 Grad), high readout speed and serial powering. As a consequence a new readout chip is required. [...]
SISSA, 2019 - 5 p. - Published in : PoS TWEPP2018 (2019) 157
In : Topical Workshop on Electronics for Particle Physics, Antwerp, Belgique, 17 - 21 Sep 2018, pp.157

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Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC / Marconi, S (Marseille, CPPM) ; Barbero, M B (Marseille, CPPM) ; Fougeron, D (Marseille, CPPM) ; Godiot, S (Marseille, CPPM) ; Menouni, M (Marseille, CPPM) ; Pangaud, P (Marseille, CPPM) ; Rozanov, A (Marseille, CPPM) ; Breugnon, P (Marseille, CPPM) ; Bomben, M (Paris U., VI-VII) ; Calderini, G (Paris U., VI-VII) et al.
The RD53A large scale pixel demonstrator chip has been developed in 65 nm CMOS technology by the RD53 collaboration, in order to face the unprecedented design requirements of the pixel 2 phase upgrades of the CMS and ATLAS experiments at CERN. This prototype chip is designed to demonstrate that a set of challenging specifications can be met, such as: high granularity (small pixels of 50×50 or 25× 100 µm2) and large pixel chip size (~2x2 cm2), high hit rate (3 GHz/cm2), high readout speed, very high radiation levels (500 Mrad - 1 Grad) and operation with serial powering. [...]
2019 - 4 p. - Published in : 10.1109/NSSMIC.2018.8824486
In : 2018 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC 2018), Sydney, Australia, 10 - 17 Nov 2018, pp.8824486

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Development of a large pixel chip demonstrator in RD53 for ATLAS and CMS upgrades / Conti, Elia (CERN) ; Barbero, Marlon (Marseille, CPPM) ; Fougeron, Denis (Marseille, CPPM) ; Godiot, Stephanie (Marseille, CPPM) ; Menouni, Mohsine (Marseille, CPPM) ; Pangaud, Patrick (Marseille, CPPM) ; Rozanov, Alexandre (Marseille, CPPM) ; Breugnon, Patrick (Marseille, CPPM) ; Bomben, Marco (Paris U., VI-VII) ; Calderini, Giovanni (Paris U., VI-VII) et al. /RD53
RD53A is a large scale 65 nm CMOS pixel demonstrator chip that has been developed by the RD53 collaboration for very high rate (3 GHz/cm$^2$) and very high radiation levels (500 Mrad, possibly 1 Grad) for ATLAS and CMS phase 2 upgrades. It features serial powering operation and design variations in the analog and digital pixel matrix for different testing purposes. [...]
SISSA, 2017 - 5 p. - Published in : PoS TWEPP-17 (2017) 005 Fulltext: PDF; External link: PoS server
In : Topical Workshop on Electronics for Particle Physics, Santa Cruz, Ca, United States Of America, 11 - 15 Sep 2017, pp.005

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