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CERN Document Server 5 ჩანაწერია ნაპოვნი  ძიებას დასჭირდა 1.32 წამი. 
1.
An Improved Algorithm for On-Chip Clustering and Lossless Data Compression of HL-LHC Pixel Hits / Baruffa, Giuseppe (Perugia U.) ; Placidi, Pisana (INFN, Perugia ; Perugia U.) ; Di Salvo, Andrea (INFN, Turin ; Polytech. Turin) ; Marconi, Sara (CERN) ; Paternò, Andrea (INFN, Turin ; Polytech. Turin)
A prototype chip, called RD53A, has been designed by the RD53 collaboration to face the very high hit and trigger rate requirements (up to 3 GHz/cm$^2$ and 1 MHz, respectively) of the High Luminosity LHC experiment upgrades. In this paper, an improved algorithm for data compression, capable of sustaining the very high data volume and proposed to be implemented in the periphery of the chip, is presented: it exploits Run Length Encoding (RLE) and Variable Length Coding (VLC) to compact chip pixel hit patterns. [...]
2019 - 5 p. - Published in : 10.1109/NSSMIC.2018.8824281
In : 2018 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC 2018), Sydney, Australia, 10 - 17 Nov 2018, pp.8824281
დეტალური ჩანაწერი - მსგავსი ჩანაწერები
2.
Precision measurement of the structure of the CMS inner tracking system using nuclear interactions / CMS Collaboration
The structure of the CMS inner tracking system has been studied using nuclear interactions of hadrons striking its material. Data from proton-proton collisions at a center-of-mass energy of 13 TeV recorded in 2015 at the LHC are used to reconstruct millions of secondary vertices from these nuclear interactions. [...]
arXiv:1807.03289; CMS-TRK-17-001; CERN-EP-2018-144; CMS-TRK-17-001-003.- Geneva : CERN, 2018-10-29 - 41 p. - Published in : JINST 13 (2018) P10034 Fulltext: 1807.03289 - PDF; fulltext1682069 - PDF; Fulltext from Publisher: PDF; External link: Figures, tables and other information
დეტალური ჩანაწერი - მსგავსი ჩანაწერები
3.
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC / Pacher, Luca (INFN, Turin) ; Monteil, Ennio (INFN, Turin) ; Paternò, Andrea (INFN, Turin ; Polytech. Turin) ; Panati, Serena (INFN, Turin ; Polytech. Turin) ; Demaria, Natale (INFN, Turin) ; Rivetti, Angelo (INFN, Turin) ; Da Rocha Rolo, Manuel Dionisio (INFN, Turin) ; Dellacasa, Giulio (INFN, Turin) ; Mazza, Giovanni (INFN, Turin) ; Rotondo, Francesco (INFN, Turin) et al.
A prototype of a new-generation readout ASIC targeting High-Luminosity (HL) LHC pixel detector upgrades has been designed and fabricated as part of the Italian INFN CHIPIX65 project using a commercial 65 nm CMOS technology. This demonstrator, hereinafter referred to as CHIPIX-FE0, is composed of a matrix of 64 x 64 pixels with 50 $\mu$m x 50 $\mu$m pixel size embedding two different architectures of analog front-ends working in parallel. [...]
SISSA, 2017 - 5 p. - Published in : PoS TWEPP-17 (2017) 024 Fulltext: PDF; External link: PoS server
In : Topical Workshop on Electronics for Particle Physics, Santa Cruz, Ca, United States Of America, 11 - 15 Sep 2017, pp.024
დეტალური ჩანაწერი - მსგავსი ჩანაწერები
4.
Development of a large pixel chip demonstrator in RD53 for ATLAS and CMS upgrades / Conti, Elia (CERN) ; Barbero, Marlon (Marseille, CPPM) ; Fougeron, Denis (Marseille, CPPM) ; Godiot, Stephanie (Marseille, CPPM) ; Menouni, Mohsine (Marseille, CPPM) ; Pangaud, Patrick (Marseille, CPPM) ; Rozanov, Alexandre (Marseille, CPPM) ; Breugnon, Patrick (Marseille, CPPM) ; Bomben, Marco (Paris U., VI-VII) ; Calderini, Giovanni (Paris U., VI-VII) et al. /RD53
RD53A is a large scale 65 nm CMOS pixel demonstrator chip that has been developed by the RD53 collaboration for very high rate (3 GHz/cm$^2$) and very high radiation levels (500 Mrad, possibly 1 Grad) for ATLAS and CMS phase 2 upgrades. It features serial powering operation and design variations in the analog and digital pixel matrix for different testing purposes. [...]
SISSA, 2017 - 5 p. - Published in : PoS TWEPP-17 (2017) 005 Fulltext: PDF; External link: PoS server
In : Topical Workshop on Electronics for Particle Physics, Santa Cruz, Ca, United States Of America, 11 - 15 Sep 2017, pp.005
დეტალური ჩანაწერი - მსგავსი ჩანაწერები
5.
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC / Paternò, Andrea (INFN, Turin ; Turin Polytechnic) ; Pacher, L (Turin U. ; INFN, Turin) ; Monteil, E (Turin U. ; INFN, Turin) ; Loddo, F (INFN, Bari) ; Demaria, N (INFN, Turin) ; Gaioni, L (INFN, Pavia ; Bergamo U., Ingengneria Dept.) ; Canio, F De (INFN, Pavia ; Pavia U.) ; Traversi, G (INFN, Pavia ; Bergamo U., Ingengneria Dept.) ; Re, V (INFN, Pavia ; Bergamo U., Ingengneria Dept.) ; Ratti, L (INFN, Pavia ; Pavia U.) et al.
This paper describes a readout ASIC prototype designed by the CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC . A 64×64 matrix of $50×50μm^{2}$ pixels is realised. [...]
2017 - 12 p. - Published in : JINST 12 (2017) C02043
In : Topical Workshop on Electronics for Particle Physics, Karlsruhe, Germany, 26 - 30 Sep 2016, pp.C02043
დეტალური ჩანაწერი - მსგავსი ჩანაწერები

ასევე იხილეთ: მსგავსი ავტორის სახელები
11 Paterno, A
2 Paterno, A.
6 Paterno, Andrea
11 Paternò, A
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