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1.
The ATLAS experiment at the CERN Large Hadron Collider: a description of the detector configuration for Run 3 / ATLAS Collaboration
The ATLAS detector is installed in its experimental cavern at Point 1 of the CERN Large Hadron Collider. During Run 2 of the LHC, a luminosity of $\mathcal{L}=2\times 10^{34}\mathrm{cm}^{-2}\mathrm{s}^{-1}$ was routinely achieved at the start of fills, twice the design luminosity. [...]
arXiv:2305.16623; CERN-EP-2022-259.- Geneva : CERN, 2024-05-23 - 233 p. - Published in : JINST 19 (2024) P05063 Fulltext: 2305.16623 - PDF; document - PDF; External link: Previous draft version
In : The Large Hadron Collider and The Experiments for Run 3
2.
Book cover lpGBT documentation : release
12 Aug 2024. - 359 p.

3.
Two low-power optical data transmission ASICs for the ATLAS Liquid Argon Calorimeter readout upgrade / Xiao, Le (Hua-Zhong Normal U., LQLP ; Southern Methodist U.) ; Zhou, Wei (Hua-Zhong Normal U., LQLP ; Southern Methodist U.) ; Sun, Quan (Southern Methodist U.) ; Deng, Binwei (Hubei Norm. U.) ; Gong, Datao (Southern Methodist U.) ; Guo, Di (Hua-Zhong Normal U., LQLP ; Southern Methodist U.) ; He, Huiqin (SZPT, Shenzhen) ; Hou, Suen (Taiwan, Inst. Phys.) ; Liu, Chonghan (Southern Methodist U.) ; Liu, Tiankuan (Southern Methodist U.) et al.
A serializer ASIC and a VCSEL driver ASIC are needed for the front-end optical data transmission in the ATLAS liquid argon calorimeter readout phase-I upgrade. The baseline ASICs are the serializer LOCx2 and the VCSEL driver LOCld, designed in a 0.25-{\mu}m Silicon-on-Sapphire (SoS) CMOS technology and consumed 843 mW and 320 mW, respectively. [...]
arXiv:2009.06148.- 2019-04-21 - 12 p. Fulltext: PDF;
In : 11th International "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors (HSTD11) in conjunction with 2nd Workshop on SOI Pixel Detectors (SOIPIX2017) at OIST, Okinawa, Japan, Okinawa, Japan, 10 - 15 Dec 2017, pp.160-165
4.
The latency validation of the optical link for the ATLAS Liquid Argon Calorimeter Phase-I trigger upgrade / Deng, Binwei (HBPU, Huangshi ; Southern Methodist U.) ; Xiao, Le (Southern Methodist U. ; Hua-Zhong Normal U.) ; Zhao, Xiandong (Southern Methodist U.) ; Baker, Emily (Unlisted, US, TX) ; Gong, Datao (Southern Methodist U.) ; Guo, D. (Southern Methodist U. ; Hua-Zhong Normal U.) ; He, Huiqin (PCL, Shenzhen) ; Hou, Suen (Academia Sinica, Taiwan) ; Liu, Chonghan (Southern Methodist U.) ; Liu, Tiankuan (Southern Methodist U.) et al.
Two optical data link data transmission Application Specific Integrated Circuits (ASICs), the baseline and its backup, have been designed for the ATLAS Liquid Argon (LAr) Calorimeter Phase-I trigger upgrade. The latency of each ASIC and that of its corresponding receiver implemented in a back-end Field-Programmable Gate Array (FPGA) are critical specifications. [...]
arXiv:2009.06143.- 2018-05-02 - 13 p. - Published in : JINST Fulltext: PDF;

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