CERN Accelerating science

Published Articles
Title A UVM simulation environment for the study, optimization and verification of HL-LHC digital pixel readout chips
Author(s) Marconi, Sara (CERN ; Perugia U. ; INFN, Perugia) ; Conti, E (CERN) ; Christiansen, J (CERN) ; Placidi, P (Perugia U. ; INFN, Perugia)
Publication 2018
Number of pages 14
In: JINST 13 (2018) P05018
DOI 10.1088/1748-0221/13/05/P05018
Subject category Detectors and Experimental Techniques
Accelerator/Facility, Experiment RD53
Project CERN HL-LHC
Abstract The operating conditions of the High Luminosity upgrade of the Large Hadron Collider are very demanding for the design of next generation hybrid pixel readout chips in terms of particle rate, radiation level and data bandwidth. To this purpose, the RD53 Collaboration has developed for the ATLAS and CMS experiments a dedicated simulation and verification environment using industry-consolidated tools and methodologies, such as SystemVerilog and the Universal Verification Methodology (UVM). This paper presents how the so-called VEPIX53 environment has first guided the design of digital architectures, optimized for processing and buffering very high particle rates, and secondly how it has been reused for the functional verification of the first large scale demonstrator chip designed by the collaboration, which has recently been submitted.
Copyright/License publication: (License: CC-BY-3.0)

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 Element opprettet 2018-10-23, sist endret 2022-08-17


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