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Bug 39993 - LLVM generates wrong MSP430 code for indirect input constraints
Summary: LLVM generates wrong MSP430 code for indirect input constraints
Status: RESOLVED FIXED
Alias: None
Product: new-bugs
Classification: Unclassified
Component: new bugs (show other bugs)
Version: trunk
Hardware: All All
: P normal
Assignee: Anton Korobeynikov
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2018-12-13 05:18 PST by Hans Winderix
Modified: 2019-01-25 01:14 PST (History)
5 users (show)

See Also:
Fixed By Commit(s):

Attachments
Proposed patch (1.04 KB, patch)
2019-01-16 04:39 PST, Hans Winderix 		Details
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Description Hans Winderix 2018-12-13 05:18:15 PST 
Since r346948, LLVM generates wrong MSP430 code for indirect input 
constraints inline assembly.

For example, for the following IR snippet

  target triple = "msp430-unknown-unknown-elf"

  define void @f() {
  entry:
    call void asm sideeffect "mov r1, $0", "*m"(i8* inttoptr (i16 256 to i8*))
    ret void
  }

the inline assembly is wrongly translated into

 	mov r1, 256(r2)

instead of into

	mov r1, &256
Comment 1 Michael Skvortsov 2019-01-11 08:01:11 PST 
The absolute addressing mode on msp430 is encoded exactly as the indexed one with r2 (status register) as a base.

In other words, these two lines
 	mov r1, 256(r2)
and
	mov r1, &256
encode exactly the same instruction.


There is no a correctness issue here. However, AsmPrinter could be taught to print absolute addressing mode in a canonical way.
Comment 2 Hans Winderix 2019-01-11 08:29:03 PST 
Thanks for having a look at this.

The assembler from TI's MSP430 GCC toolchain (MSP430-GCC 7.3.2.154 release) refuses to assemble

mov r1, 256(r2)

with the following error message

Error: r2 should not be used in indexed addressing mode.
Comment 3 Hans Winderix 2019-01-16 04:39:22 PST 
Created attachment 21336 [details]
Proposed patch

Convert r2-indexed addressing mode into absolute addressing mode
Comment 4 Anton Korobeynikov 2019-01-25 01:14:44 PST 
Fixed in r352178